Search Results - "MATLAB HDL coder"

Implementation of hyperbolic tangent function in neural network using Matlab HDL coder for Biosignals

Authors: André David Colindres Nasser Jorge Canales Verdial José Luis Ordoñez-Avila

Source: 2025 10th International Conference on Control and Robotics Engineering (ICCRE). :316-322

FPGA Design and Implementation for Montgomery Multiplication Algorithm Using MATLAB HDL Coder

Authors: Ghada Elsayed Eman S. Abass

Source: Bulletin of the National Research Centre, Vol 48, Iss 1, Pp 1-16 (2024)

Subject Terms: Science, MATLAB HDL coder, 02 engineering and technology, Electrical and Computer Engineering, Cryptographic co-processors, HDL coder, Security, 0202 electrical engineering, electronic engineering, information engineering, Computer Engineering, FPGA, Matlab

Access URL: https://doaj.org/article/ba613135c2c14de8b39ee6185e996199

An optimizing technique for using MATLAB HDL coder

Authors: Somaya Kayed Ghada Elsayed

Source: Bulletin of the National Research Centre, Vol 47, Iss 1, Pp 1-8 (2023)

Subject Terms: FPGA, MATLAB HDL coder, AES, Science

File Description: electronic resource

Relation: https://doaj.org/toc/2522-8307

Access URL: https://doaj.org/article/bf774f0829ac4be1aa03258662ea7e0c

Chaotic or Hyper-chaotic Oscillator? Numerical Solution, Circuit Design, MATLAB HDL-Coder Implementation, VHDL Code, Security Analysis, and FPGA Realization

Authors: Talal Bonny

Source: Circuits, Systems, and Signal Processing. 40:1061-1088

Subject Terms: 0103 physical sciences, 01 natural sciences

Access URL: https://dblp.uni-trier.de/db/journals/cssp/cssp40.html#Bonny21
https://link.springer.com/article/10.1007/s00034-020-01521-8

A Comparative Study between MATLAB HDL Coder and VHDL for FPGAs Design and implementation

Authors: Elsayed, Ghada Kayed, Somaya

Source: Journal of International Society for Science and Engineering. 0:0-0

Subject Terms: FPGA MATLAB HDL CODER VHDL Hardware Security, Computer Engineering, Electrical and Computer Engineering

Rapid Prototyping for Design and Test of FPGA-Based Model Predictive Controllers for Power Converters

Authors: Purraji, Marziye Zamiri Mamooliraftar, Elyas Sánchez González, Alberto et al.

Contributors: Purraji, Marziye Zamiri Mamooliraftar, Elyas Sánchez González, Alberto et al.

Source: Biblos-e Archivo. Repositorio Institucional de la UAM
Universidad Autónoma de Madrid

Subject Terms: Informática, MATLAB HDL Coder, Finite Control Set, Power Electronics, FPGA, Model Predictive Control

File Description: application/pdf

Access URL: http://hdl.handle.net/10486/718450
https://hdl.handle.net/10486/718450
https://doi.org/10.1007/s42835-025-02173-x

FPGA design and implementation for montgomery multiplication algorithm using MATLAB HDL coder.

Authors: Elsayed, Ghada Abass, Eman S.

Source: Bulletin of the National Research Centre; 12/23/2024, Vol. 48 Issue 1, p1-16, 16p

Subject Terms: VERILOG (Computer hardware description language), RSA algorithm, ELLIPTIC curves, COPROCESSORS, MULTIPLICATION

An optimizing technique for using MATLAB HDL coder.

Authors: Kayed, Somaya Elsayed, Ghada

Source: Bulletin of the National Research Centre; 6/30/2023, Vol. 47 Issue 1, p1-8, 8p

Subject Terms: CLOCKS & watches, MATHEMATICAL optimization, PROOF of concept

FPGA Design and Implementation for Pseudorandom Number Generator based square root (SR-PRNG)

Authors: Elsayed, Ghada Kayed, Somaya

Source: Journal of International Society for Science and Engineering. 5:8-11

Subject Terms: Computer Engineering, Electrical and Computer Engineering, PRNG FPGA MATLAB HDL CODER

FPGA design and implementation for adaptive digital chaotic key generator

Authors: Ghada Elsayed Elsayed Soleit Somaya Kayed

Source: Bulletin of the National Research Centre, Vol 47, Iss 1, Pp 1-9 (2023)

Subject Terms: FPGA, MATLAB HDL Coder, Chaotic, Science

File Description: electronic resource

Relation: https://doaj.org/toc/2522-8307

Access URL: https://doaj.org/article/aaf02088b3824fd09d9f453f6ee0d604

Chaotic or Hyper-chaotic Oscillator? Numerical Solution, Circuit Design, MATLAB HDL-Coder Implementation, VHDL Code, Security Analysis, and FPGA Realization.

Authors: Bonny, Talal

Source: Circuits, Systems & Signal Processing; Mar2021, Vol. 40 Issue 3, p1061-1088, 28p

Subject Terms: GATE array circuits, CHAOTIC communication, NONLINEAR oscillators, ELECTRIC oscillators

FPGA design and implementation for adaptive digital chaotic key generator.

Authors: Elsayed, Ghada Soleit, Elsayed Kayed, Somaya

Source: Bulletin of the National Research Centre; 8/11/2023, Vol. 47 Issue 1, p1-9, 9p

Subject Terms: DIGITAL technology, COMPUTER software security, DIGITAL signatures, RANDOM numbers, INFORMATION technology security, IMAGE encryption

Performance Evaluation of FPGA-Based Design of Modified Chua Oscillator.

Authors: Taşdemir, Muhammed Furkan Litvinenko, Anna Koyuncu, İsmail et al.

Source: Chaos Theory & Applications (CHTA); 2024, Vol. 6 Issue 4, p249-256, 8p

Subject Terms: NUMBER systems, POPULARITY, ALGORITHMS

Area, Speed and Power Optimized Implementation of a Band-Pass FIR Filter Using High-Level Synthesis.

Authors: Sikka, Prateek Asati, Abhijit R. Shekhar, Chandra

Source: Wireless Personal Communications; Dec2022, Vol. 127 Issue 3, p1869-1878, 10p

Subject Terms: FINITE impulse response filters, FIELD programmable gate arrays, DIGITAL signal processing, SIGNAL filtering

Evaluation of high-level synthesis tools for generation of Verilog code from MATLAB based environments

Authors: Bäck, Carl

Index Terms: HLS, System Generator for DSP, Histogram, Xilinx Zynq UltraScale+, FPGA design workflow, Hardware Description Language Coder, HDL Coder, Field Programmable Gate Arrays, Image processing, Electrical Engineering, Electronic Engineering, Information Engineering, Elektroteknik och elektronik, Student thesis, info:eu-repo/semantics/bachelorThesis, text

URL: http://urn.kb.se/resolve?urn=urn:nbn:se:ltu:diva-78738

Progressive Cyclical Convolutional Neural Network for embedded vision based Internet of Things using VLSI.

Authors: Jayakumar, S. Gouthami, Koduru Chanthirasekaran, K. et al.

Source: Analog Integrated Circuits & Signal Processing; Dec2025, Vol. 125 Issue 3, p1-12, 12p

IoT integrated CNN framework for automated detection and quantification of rice and potato crop diseases.

Authors: Verma, Gaurav Saxena, Abhishek Kumar Rai, Mritunjay et al.

Source: Scientific Reports; 10/31/2025, Vol. 15 Issue 1, p1-19, 19p

Subject Terms: CONVOLUTIONAL neural networks, PLANT diseases, SUSTAINABLE agriculture, INTERNET of things, REAL-time computing, IMAGE processing, PRECISION farming

Development and application of new 2D Cubic-Sine hyperchaotic map.

Authors: Wu, Wanqing Zhou, Jipeng

Source: Cybersecurity (2523-3246); 10/5/2025, Vol. 8 Issue 1, p1-17, 17p

Subject Terms: CRYPTOGRAPHY, IMAGE encryption, LYAPUNOV exponents, RANDOM number generators, DATA distribution, DYNAMICAL systems

Contextual Real-Time Optimization on FPGA by Dynamic Selection of Chaotic Maps and Adaptive Metaheuristics.

Authors: Ouchker, Rabab Tahiri, Hamza Mchichou, Ismail et al.

Source: Applied Sciences (2076-3417); Oct2025, Vol. 15 Issue 19, p10695, 35p

Subject Terms: FIELD programmable gate arrays, METAHEURISTIC algorithms, MATHEMATICAL optimization, PROBLEM solving, DYNAMIC programming, ARTIFICIAL intelligence

EFFICIENT IMPLEMENTATION OF FRACTIONAL SAMPLING RATE CONVERSION (SRC) ON FPGA.

Authors: GADAWE, Noor Talal HAMAD, Rasha Waleed QADDOORI, Sahar Lazim

Source: Diagnostyka; 2025, Vol. 26 Issue 3, p1-9, 9p

Subject Terms: DIGITAL signal processing, FIELD programmable gate arrays, DISCRETE time filters, RESOURCE management, ELECTRIC filters, INTERPOLATION