Výsledky vyhledávání - "Java processor"

An Evaluation of Safety-Critical Java on a Java Processor

Autoři: Juan Ricardo Rios Martin Schoeberl O'Connor, Lisa

Přispěvatelé: Juan Ricardo Rios Martin Schoeberl O'Connor, Lisa

Zdroj: Rios Rivas, J R & Schoeberl, M 2014, An evaluation of safety-critical Java on a Java processor . in L O'Connor (ed.), 2014 IEEE 17th International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing (ISORC) . IEEE, International Symposium on Object-Oriented Real-Time Distributed Computing, pp. 276-283, 17th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, ISORC, Reno, Nevada, United States, 10/06/2014 . https://doi.org/10.1109/ISORC.2014.41

Témata: Benchmark testing, Computing and Processing, Embedded systems, Resource management, 02 engineering and technology, Time measurement, 3. Good health, Safety-critical Java, Instruction sets, Java processor, Safety-critical systems, 0202 electrical engineering, electronic engineering, information engineering, Real-time systems, Java, Memory management

Popis souboru: application/pdf

Přístupová URL adresa: http://www.jopdesign.com/doc/jopscjeval.pdf
https://orbit.dtu.dk/en/publications/e61f4424-3d93-4808-8b0c-9a49d539bcf1

Exploiting an abstract-machine-based framework in the design of a Java ILP processor

Autoři: Wang, H.C. Yuen, C.K. COMPUTER SCIENCE

Přispěvatelé: Wang, H.C. Yuen, C.K. COMPUTER SCIENCE

Zdroj: Journal of Systems Architecture. 55:53-60

Témata: ILP, Abstract machine, Java processor, Embedded processor, VLIW, 0202 electrical engineering, electronic engineering, information engineering, 02 engineering and technology

Embedded JIT compilation with CACAO on YARI

Autoři: Florian Brandner Tommy Thorn Martin Schoeberl a další

Přispěvatelé: Florian Brandner Tommy Thorn Martin Schoeberl a další

Zdroj: http://www.vmars.tuwien.ac.at/php/pserver/extern/download.php?fileid=1547.

Témata: JIT compilation, Real-time system, Java processor

Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.164.1581; http://www.vmars.tuwien.ac.at/php/pserver/extern/download.php?fileid=1547

Dostupnost: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.164.1581
http://www.vmars.tuwien.ac.at/php/pserver/extern/download.php?fileid=1547

A ravenscarjava profile implementation

Autoři: Hans Søndergaard Bent Thomsen Anders P. Ravn a další

Přispěvatelé: Hans Søndergaard Bent Thomsen Anders P. Ravn a další

Zdroj: http://people.cs.aau.dk/~bnielsen/DSE07/papers/Ravenscar_final.pdf.

Témata: Categories and Subject Descriptors D.3.3 [Programming Languages, Language Constructs and Features, D.3.4 [Programming Languages, Processors – Run- time environments, D.4.1 [Operating Systems, Process Management- Scheduling, Threads, J.7 [Computer Applications, Computers in Other Systems – Real time. General Terms Design, Languages, Performance. Keywords Ravenscar-Java profile, Real-time Java, Java processor, Industrial

Popis souboru: application/pdf

Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.556.8225; http://people.cs.aau.dk/~bnielsen/DSE07/papers/Ravenscar_final.pdf

Dostupnost: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.556.8225
http://people.cs.aau.dk/~bnielsen/DSE07/papers/Ravenscar_final.pdf

Real-time Event-handling and Scheduling on a Multithreaded Java Microcontroller

Autoři: J. Kreuzinger U. Brinkschulte M. Pfeffer a další

Přispěvatelé: J. Kreuzinger U. Brinkschulte M. Pfeffer a další

Zdroj: http://www.informatik.uni-augsburg.de/lehrstuehle/info3/research/komodo/publications/microproc03.ps.

Témata: Key words, multithreaded processor, Java processor, multithreaded

Popis souboru: application/postscript

Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.12.1451

Dostupnost: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.12.1451
http://www.informatik.uni-augsburg.de/lehrstuehle/info3/research/komodo/publications/microproc03.ps

Design of an optimal folding mechanism for Java processors

Autoři: Lee-ren Ton A Lung-chung Chang A Jyh-jiun Shann A a další

Přispěvatelé: Lee-ren Ton A Lung-chung Chang A Jyh-jiun Shann A a další

Zdroj: http://www.cse.hcmut.edu.vn/~anhvu/teaching/2006/ACA/12.pdf.

Témata: Java Virtual Machine, Stack operations folding, POC folding model, EPOC folding model, Java processor

Popis souboru: application/pdf

Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.98.3801; http://www.cse.hcmut.edu.vn/~anhvu/teaching/2006/ACA/12.pdf

Dostupnost: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.98.3801
http://www.cse.hcmut.edu.vn/~anhvu/teaching/2006/ACA/12.pdf

Software–Practice and Experience

Autoři: Softw Pract Exper Martin Schoeberl Wolfgang Puffitsch a další

Přispěvatelé: Softw Pract Exper Martin Schoeberl Wolfgang Puffitsch a další

Zdroj: http://www.jopdesign.com/doc/wcetana.pdf.

Témata: KEY WORDS, Worst-case execution time, Java processor, Real-time system

Popis souboru: application/pdf

Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.158.3076; http://www.jopdesign.com/doc/wcetana.pdf

Dostupnost: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.158.3076
http://www.jopdesign.com/doc/wcetana.pdf

Time-predictable Java chip-multiprocessor

Autoři: Pitter, Christof Grünbacher, Herbert Weiss, Reinhold

Přispěvatelé: Pitter, Christof Grünbacher, Herbert Weiss, Reinhold

Témata: Echtzeitsysteme, Chip-Multiprozessor, Java Prozessor, Speicherarbitrierung, WCET Analyse, Real-time systems, Chip-Multiprocessor, Java processor, Memory arbitration, WCET analysis

Popis souboru: XIV, 135 S.

Relation: https://resolver.obvsg.at/urn:nbn:at:at-ubtuw:1-29095; http://hdl.handle.net/20.500.12708/14733; AC05040345; urn:nbn:at:at-ubtuw:1-29095

Dostupnost: https://resolver.obvsg.at/urn:nbn:at:at-ubtuw:1-29095
https://hdl.handle.net/20.500.12708/14733

VHDL vs. Bluespec System Verilog: A case study on a Java embedded architecture

Autoři: Gruian, Flavius Westmijze, Mark

Témata: Computer Sciences, Java processor, embedded systems, Bluespec

Relation: https://lup.lub.lu.se/record/622816; http://dx.doi.org/10.1145/1363686.1364037; wos:000268392201125; scopus:56749101675

Dostupnost: https://lup.lub.lu.se/record/622816
https://doi.org/10.1145/1363686.1364037

Evaluation of aJile aJ-80 Real-Time embedded platform for RT-Java parameters

Autoři: Krejcar, Ondřej Tučník, Petr Adamec, Ondřej

Témata: real-time (RT), real-time specification for Java (RTSJ), Java processor, finite impulse response (FIR), filter, infinite impulse response (IIR) filter

Popis souboru: text/plain; downloadable_files_count: 0

Relation: Measurement; http://dx.doi.org/10.1016/j.measurement.2011.03.030; https://hdl.handle.net/10084/89036; Není ve fondu ÚK; 000292442600005

Dostupnost: https://hdl.handle.net/10084/89036
https://doi.org/10.1016/j.measurement.2011.03.030

An Evaluation of Safety-Critical Java on a Java Processor

Autoři: Juan Ricardo Rios Martin Schoeberl The Pennsylvania State University CiteSeerX Archives

Přispěvatelé: Juan Ricardo Rios Martin Schoeberl The Pennsylvania State University CiteSeerX Archives

Zdroj: http://www.jopdesign.com/doc/jopscjeval.pdf.

Témata: Index Terms—Real-time systems, Embedded systems, Java, Safety-critical systems, Safety-critical Java, Java processor

Popis souboru: application/pdf

Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.698.3801; http://www.jopdesign.com/doc/jopscjeval.pdf

Dostupnost: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.698.3801
http://www.jopdesign.com/doc/jopscjeval.pdf

An Instruction Cache Architecture for Parallel Execution of Java Threads

Autoři: Wanming Chu Yamin Li The Pennsylvania State University CiteSeerX Archives

Přispěvatelé: Wanming Chu Yamin Li The Pennsylvania State University CiteSeerX Archives

Zdroj: http://cis.k.hosei.ac.jp/~yamin/papers/PDCAT03-cache.pdf.

Témata: Cache, Java virtual machine, Java processor, instruction level parallelism, thread level parallelism, multithreading, performance evaluation, trace-driven simulation

Popis souboru: application/pdf

Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.78.6909

Dostupnost: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.78.6909
http://cis.k.hosei.ac.jp/~yamin/papers/PDCAT03-cache.pdf

ABSTRACT WCET Analysis for a Java Processor

Autoři: Martin Schoeberl The Pennsylvania State University CiteSeerX Archives

Přispěvatelé: Martin Schoeberl The Pennsylvania State University CiteSeerX Archives

Zdroj: http://www.jopdesign.com/doc/wcet_jtres2006.pdf.

Témata: Java processor, Worst-case execution time

Popis souboru: application/pdf

Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.72.4109; http://www.jopdesign.com/doc/wcet_jtres2006.pdf

Dostupnost: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.72.4109
http://www.jopdesign.com/doc/wcet_jtres2006.pdf

Real-Time Wait-Free Queues using Micro-Transactions

Autoři: Fadi Meawad Martin Schoeberl Karthik Iyer a další

Přispěvatelé: Fadi Meawad Martin Schoeberl Karthik Iyer a další

Zdroj: http://www.jopdesign.com/doc/utran.pdf.

Témata: Memory, Optimizations, Real-time, Java Processor Keywords Transactional Memory, CAS, MCAS, Wait-Free queue

Popis souboru: application/pdf

Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.228.5672; http://www.jopdesign.com/doc/utran.pdf

Dostupnost: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.228.5672
http://www.jopdesign.com/doc/utran.pdf

DESIGNING A MEMORY SYSTEM USING A STATIC LOADER FOR EMBEDDED JAVA ARCHITECTURES

Autoři: Austin Kim Yang Qian Morris Chang a další

Přispěvatelé: Austin Kim Yang Qian Morris Chang a další

Zdroj: http://php.cse.psu.edu/~vijay/javaworkshop/8/w99_sub2.pdf.

Témata: Key words, Java programming language, Java bytecode, embedded system, real-time system, Java memory, Java processor, Java Virtual Machine (JVM

Popis souboru: application/pdf

Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.132.9226; http://php.cse.psu.edu/~vijay/javaworkshop/8/w99_sub2.pdf

Dostupnost: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.132.9226
http://php.cse.psu.edu/~vijay/javaworkshop/8/w99_sub2.pdf

The Delft-Java Engine

Autoři: Glossner III, C.J. (author) Vassiliadis, S. (promotor)

Přispěvatelé: Glossner III, C.J. (author) Vassiliadis, S. (promotor)

Témata: computer arithmetic, java processor, multimedia enhancements, computer design and engineering, hardware accelerators, multimedia architecture, multimedia processors

Přístupová URL adresa: http://resolver.tudelft.nl/uuid:276fcdbf-9c71-4175-879c-176102028e08

Izvedba aritmetičko-logičke jedinice i stoga za Java procesor primjenom programabilnih logičkih polja

Autoři: Molnar, Goran

Témata: Java procesor, aritmetičko-logička jedinica, stog, FPGA, arithmetic-logic unit, Java processor, stack

Přístupová URL adresa: https://www.bib.irb.hr/608585

四核心Java處理器的架構改進 ; Architectural Optimization for a Quad-Core Java Processor

Autoři: 陳政揚 蔡淳仁 Chen, Cheng-Yang a další

Přispěvatelé: 陳政揚 蔡淳仁 Chen, Cheng-Yang a další

Témata: Java處理器, 多核心, 嵌入式SoC, 快取一致性, Java processor, multi-core, embedded SoC, cache coherence, stat, relig

Relation: http://hdl.handle.net/11536/139418

Dostupnost: http://hdl.handle.net/11536/139418

A hardware peripheral for Java bytecodes translation acceleration

Autoři: Sideris, I Moshopoulos, N Pekmestzi, K

Témata: ASIC, Java processor, RISC, stack folding, ASIC technologies, Hard task, Hardware acceleration units, Java bytecodes, Java processors, Java program, Just-in-time compilation, Speed-ups, Electric power supplies to apparatus, Embedded systems, Java programming language, Just in time production, Nanotechnology, Reduced instruction set computing, Computer software

Relation: https://dspace.lib.ntua.gr/xmlui/handle/123456789/32746; 552; 553

Dostupnost: https://dspace.lib.ntua.gr/xmlui/handle/123456789/32746
https://doi.org/10.1145/1774088.1774201

Extending an embedded RISC microprocessor for efficient translation based Java execution

Autoři: Sideris, I Pekmestzi, K Economakos, G

Témata: Codesigned virtual machine, Embedded Java, Java processor, Computer Science, Hardware & Architecture, Theory & Methods, Engineering, Electrical & Electronic, Embedded appliances, Embedded RISC processors, Hand held device, Java execution, Java virtual machines, Operating systems, Risc microprocessors, RISC processors, Security checks, Set top box, Smart phones, Computer operating systems, Embedded systems, Java programming language, Reduced instruction set computing

Relation: https://dspace.lib.ntua.gr/xmlui/handle/123456789/19601; ISI:000272332600001; 33; 415; 429

Dostupnost: https://dspace.lib.ntua.gr/xmlui/handle/123456789/19601
https://doi.org/10.1016/j.micpro.2009.06.003