Suchergebnisse - "Hardware security"

Clock-to-Clock Modulation Covert Channel

Autoren: Bahi, Mohamed Alla Eddine Real, Maria Mendez Nogues, Erwan et al.

Weitere Verfasser: Bahi, Mohamed Alla Eddine Real, Maria Mendez Nogues, Erwan et al.

Quelle: 2025 International Symposium on Electromagnetic Compatibility – EMC Europe. :869-874

Schlagwörter: side-channel attack, air-gap systems, [INFO.INFO-TS] Computer Science [cs]/Signal and Image Processing, [SPI.ELEC] Engineering Sciences [physics]/Electromagnetism, hardware security, electromagnetic covert attack, spread-spectrum clock, [INFO.INFO-CR] Computer Science [cs]/Cryptography and Security [cs.CR], [INFO.INFO-ES] Computer Science [cs]/Embedded Systems

Dateibeschreibung: application/pdf

Monocle: Transient Execution Proof Memory Views for Runtime Compiled Code

Autoren: Matteo Oldani William Blair Shweta Shinde et al.

Quelle: Proceedings of the 20th ACM Asia Conference on Computer and Communications Security. :1188-1202

Schlagwörter: In-Process Isolation, Spectre, Hardware Security

AudioGap: An AirGapped Covert Channel Exploiting the Frequency Diversity of Audio IC Electromagnetic Leakage

Autoren: Bahi, Mohamed Méndez Real, Maria Nogues, Erwan et al.

Weitere Verfasser: Bahi, Mohamed Méndez Real, Maria Nogues, Erwan et al.

Quelle: 2025 IEEE 49th Annual Computers, Software, and Applications Conference (COMPSAC). :989-994

Schlagwörter: CFDM, [INFO.INFO-TS] Computer Science [cs]/Signal and Image Processing, [SPI.ELEC] Engineering Sciences [physics]/Electromagnetism, Signal Processing, Electromagnetic Attack, Hardware Security, Airgapped Systems, Side-Channel Attack, Covert-Channel Attack, [INFO.INFO-CR] Computer Science [cs]/Cryptography and Security [cs.CR], [INFO.INFO-ES] Computer Science [cs]/Embedded Systems

Dateibeschreibung: application/pdf

Zugangs-URL: https://hal.science/hal-05073938v1
https://hal.science/hal-05073938v1/document
https://doi.org/10.1109/compsac65507.2025.00128

Detecting Hardware Trojans in Microprocessors via Hardware Error Correction Code-based Modules

Autoren: Palumbo, Alessandro Salvador, Ruben

Weitere Verfasser: Palumbo, Alessandro Salvador, Ruben

Quelle: 2025 IEEE 31st International Symposium on On-Line Testing and Robust System Design (IOLTS). :1-7

Schlagwörter: FOS: Computer and information sciences, Cryptography and Security, Hardware Trojans, Hardware Security, RISC-V, Error Correction Codes, Cryptography and Security (cs.CR), Microprocessor-based System, [INFO.INFO-CR] Computer Science [cs]/Cryptography and Security [cs.CR]

Dateibeschreibung: application/pdf

Zugangs-URL: http://arxiv.org/abs/2506.15417

Unleashing OpenTitan’s Potential: a Silicon-Ready Embedded Secure Element for Root of Trust and Cryptographic Offloading

Autoren: Maicol Ciani Emanuele Parisi Alberto Musa et al.

Quelle: ACM Transactions on Embedded Computing Systems. 24:1-29

Schlagwörter: Signal Processing (eess.SP), FOS: Electrical engineering, electronic engineering, information engineering, Embedded Systems, Hardware Security, Hardware Root of Trust, Systems and Control (eess.SY), Electrical Engineering and Systems Science - Signal Processing, Electrical Engineering and Systems Science - Systems and Control

Zugangs-URL: http://arxiv.org/abs/2406.11558
https://dl.acm.org/doi/10.1145/3690823
https://hdl.handle.net/11585/1025793
https://doi.org/10.1145/3690823

Enhancing DFT Security in Chiplet-Based Systems With Encryption and Integrity Checking

Autoren: Juan Suzano Anthony Philippe Fady Abouzeid et al.

Weitere Verfasser: Juan Suzano Anthony Philippe Fady Abouzeid et al.

Quelle: IEEE Journal on Emerging and Selected Topics in Circuits and Systems. 15:493-505

Schlagwörter: IEEE 1687, Chiplet, [INFO.INFO-AR] Computer Science [cs]/Hardware Architecture [cs.AR], Design for Testability (DFT), IJTAG, [INFO.INFO-ET] Computer Science [cs]/Emerging Technologies [cs.ET], IEEE 1838, Hardware Security, 2.5D, Root of Trust, 3DIC, Scan Encryption, [INFO.INFO-CR] Computer Science [cs]/Cryptography and Security [cs.CR]

Dateibeschreibung: application/pdf

When Random Is Bad: Selective CRPs for Protecting PUFs Against Modeling Attacks

Autoren: Mieszko Ferens Edlira Dushku Sokol Kosta

Quelle: Ferens, M, Dushku, E & Kosta, S 2025, 'When Random is Bad : Selective CRPs for Protecting PUFs against Modeling Attacks', IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 44, no. 5, pp. 1648-1661. https://doi.org/10.1109/TCAD.2024.3506217
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Schlagwörter: IoT, Hardware security, Physical Unclonable Function, physical unclonable function (PUF), hardware security, selective challenge-response pair (CRP), selective CRP, modeling attack, PUF

Dateibeschreibung: application/pdf

Zugangs-URL: https://vbn.aau.dk/da/publications/f5afe4dc-0c28-4c0c-a871-762a51c4a715
http://www.scopus.com/inward/record.url?scp=105003697915&partnerID=8YFLogxK
https://doi.org/10.1109/TCAD.2024.3506217
https://vbn.aau.dk/ws/files/755415258/acceptedManuscript.pdf

A Multi-Bit PUF Architecture Using a 2T Sub-Threshold Voltage Divider

Autoren: Vatalaro M. De Rose R. Maccaronio V. et al.

Quelle: 2025 IEEE International Symposium on Circuits and Systems (ISCAS). :1-5

Schlagwörter: multi-bit, sub-threshold voltage divider, SMV, hardware security, PUF

Zugangs-URL: https://hdl.handle.net/20.500.11770/387402
https://doi.org/10.1109/ISCAS56072.2025.11044271

Anti-Counterfeiting Secured Design of a Bandgap Reference Circuit

Autoren: Hammam, Hazem H. Aboushady, Hassan Stratigopoulos, Haralampos-G. et al.

Weitere Verfasser: Hammam, Hazem H. Aboushady, Hassan Stratigopoulos, Haralampos-G. et al.

Quelle: 2025 IEEE International Symposium on Circuits and Systems (ISCAS). :1-5

Schlagwörter: Piracy, Locking, Analog and mixed-signal circuits, Bandgap reference circuits, [SPI.NANO] Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, Counterfeiting, Hardware security and trust, [INFO.INFO-CR] Computer Science [cs]/Cryptography and Security [cs.CR]

Dateibeschreibung: application/pdf

Zugangs-URL: https://hal.science/hal-04938873v1

Training Solo: On the Limitations of Domain Isolation Against Spectre-v2 Attacks: On the Limitations of Domain Isolation Against Spectre-v2 Attacks

Autoren: Wiebing, Sander Giuffrida, Cristiano

Quelle: 2025 IEEE Symposium on Security and Privacy (SP)

Schlagwörter: systems security, transient execution, hardware security, side channels, spectre, microarchitectural security, program and binary analysis

Zugangs-URL: https://hdl.handle.net/1871.1/ff1d9430-aec4-4a5c-8e2c-372484c32047
https://doi.org/10.1109/SP61157.2025.00253
https://research.vu.nl/en/publications/ff1d9430-aec4-4a5c-8e2c-372484c32047

Code Encryption for Confidentiality and Execution Integrity Down to Control Signals

Autoren: Gousselot, Theophile Dutertre, Jean-Max Potin, Olivier et al.

Weitere Verfasser: Gousselot, Theophile Dutertre, Jean-Max Potin, Olivier et al.

Quelle: 2025 IEEE International Symposium on Hardware Oriented Security and Trust (HOST). :403-414

Schlagwörter: Ascon, control signal integrity, [SPI] Engineering Sciences [physics], hardware security, fault injection attacks, RISC-V, control flow integrity, chained instruction encryption, countermeasures

Dateibeschreibung: application/pdf

Zugangs-URL: https://hal.science/hal-04919136v1

Input-Triggered Hardware Trojan Attack on Spiking Neural Networks

Autoren: Raptis, Spyridon Kling, Paul Kaskampas, Ioannis et al.

Weitere Verfasser: Raptis, Spyridon Kling, Paul Kaskampas, Ioannis et al.

Quelle: Raptis, S, Kling, P, Kaskampas, I, Alouani, I & Stratigopoulos, H-G 2025, Input-triggered hardware trojan attack on spiking neural networks. in 2025 IEEE International Symposium on Hardware Oriented Security and Trust (HOST): Proceedings. 2025 IEEE International Symposium on Hardware Oriented Security and Trust (HOST): Proceedings, Institute of Electrical and Electronics Engineers Inc., 2025 IEEE International Symposium on Hardware Oriented Security and Trust (HOST), San Jose, United States, 06/05/2025. https://doi.org/10.1109/HOST64725.2025.11050044

Schlagwörter: [INFO.INFO-AI] Computer Science [cs]/Artificial Intelligence [cs.AI], FOS: Computer and information sciences, Spiking neural networks, neural network, Computer Science - Artificial Intelligence, [SPI.NANO] Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, Computer Science - Neural and Evolutionary Computing, Hardware security and trust, Artificial Intelligence (cs.AI), hardware trojan, Neuromorphic computing, spiking neural networks, Hardware Trojans, Neural and Evolutionary Computing (cs.NE), [INFO.INFO-CR] Computer Science [cs]/Cryptography and Security [cs.CR]

Dateibeschreibung: application/pdf

Zugangs-URL: http://arxiv.org/abs/2503.21793
https://pure.qub.ac.uk/en/publications/5b73de6a-b6d9-4255-9b51-28cb5be3cf4e
https://hal.science/hal-04999625v1

Hardware/Software Runtime for GPSA Protection in RISC-V Embedded Cores

Autoren: Savary, Louis Rokicki, Simon Derrien, Steven et al.

Weitere Verfasser: Savary, Louis Rokicki, Simon Derrien, Steven et al.

Quelle: 2025 Design, Automation & Test in Europe Conference (DATE). :1-7

Schlagwörter: Hardware Security, Control Flow Integrity, [INFO] Computer Science [cs]

Dateibeschreibung: application/pdf

Zugangs-URL: https://hal.science/hal-04788484v3

Analog Circuit Anti-Piracy Security by Exploiting Device Ratings

Autoren: Hammam, Hazem Aboushady, Hassan Stratigopoulos, Haralampos-G. et al.

Weitere Verfasser: Hammam, Hazem Aboushady, Hassan Stratigopoulos, Haralampos-G. et al.

Quelle: 2025 Design, Automation & Test in Europe Conference (DATE). :1-7

Schlagwörter: IC piracy, [SPI.NANO] Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, analog and mixed-signal ICs, Hardware security and trust, low-dropout regulator, locking, [INFO.INFO-CR] Computer Science [cs]/Cryptography and Security [cs.CR]

Dateibeschreibung: application/pdf

Zugangs-URL: https://hal.science/hal-04829913v1/document
https://doi.org/10.23919/date64628.2025.10992961
https://hal.science/hal-04829913v1

Hybrid Logic Locking Using Horned Lizard Optimization and Q-Learning for Secure Hardware Design

Autoren: S., Karthik C., Sujatha M., Premkumar

Quelle: Tehnicki vjesnik - Technical Gazette. 32

Schlagwörter: logic locking, intellectual property protection, hardware security, horned lizard optimization, Q-Learning

Dateibeschreibung: application/pdf

Thermal Side-Channel Threats in Densely Integrated Microarchitectures: A Comprehensive Review for Cyber–Physical System Security

Schlagwörter: Hardware and Architecture, Artificial Intelligence, Physical Unclonable Functions (PUFs) and Hardware Security, Cryptographic Implementations and Security, Electrical and Electronic Engineering, Advancements in Semiconductor Devices and Circuit Design

Zugangs-URL: https://publications.polymtl.ca/69104/

Recent advances in ferroelectric materials, devices, and in-memory computing applications

Autoren: Hwiho Hwang Sangwook Youn Hyungjin Kim

Quelle: Nano Convergence, Vol 12, Iss 1, Pp 1-31 (2025)

Schlagwörter: Ferroelectric thin films, Non-volatile memory devices, In-memory computing, Neuromorphic computing, Hardware security, Technology, Chemical technology, TP1-1185, Biotechnology, TP248.13-248.65, Science, Physics, QC1-999

Dateibeschreibung: electronic resource

Relation: https://doaj.org/toc/2196-5404

Zugangs-URL: https://doaj.org/article/5413daaeac9647c69c932378e530adf0

Research on Multi-Technology Integrated Anti-Mechanical Attack Scheme Based on Vibration Sensors

Autoren: HUANG Daoqi, ZHANG Huajun, SUN Ning, ZHUANG Lihua, XU Shoukun

Quelle: Jisuanji gongcheng, Vol 51, Iss 10, Pp 213-224 (2025)

Schlagwörter: hardware security, predictive maintenance, industrial internet of things, adversarial scenarios, random interference, Computer engineering. Computer hardware, TK7885-7895, Computer software, QA76.75-76.765

Dateibeschreibung: electronic resource

Relation: https://www.ecice06.com/fileup/1000-3428/PDF/jsjgc-51-10-213.pdf; https://doaj.org/toc/1000-3428

Zugangs-URL: https://doaj.org/article/5a524cca95a04893aae82d02c30073b0

Hardware Design of an Advanced-Feature Cryptographic Tile Within the European Processor Initiative

Autoren: Nannipieri, Pietro Crocetti, Luca Di Matteo, Stefano et al.

Quelle: IEEE Transactions on Computers. 74:762-775

Schlagwörter: AES, ECC, RNG, SHA, RISC-V, EPI, Cryptoprocessor, Hardware, Security, Root of Trust, Chain of Trust, Secure boot

Dateibeschreibung: application/pdf

Zugangs-URL: https://ieeexplore.ieee.org/document/10130378
https://hdl.handle.net/11568/1180007
https://doi.org/10.1109/TC.2023.3278536

Highly Stable PUFs Based on Stacked Voltage Divider for Near-Zero BER Native Sensitivity to Voltage Variations

Autoren: Vatalaro, M De Rose, R Maccaronio, V et al.

Quelle: IEEE Transactions on Circuits and Systems I: Regular Papers. 72:521-534

Schlagwörter: IoT, Hardware security, physically unclonable function