Suchergebnisse - "Hardware Aware"

Hardware-Aware Bayesian Neural Architecture Search of Quantized CNNs

Autoren: Perrin, Mathieu Guicquero, William Paille, Bruno et al.

Weitere Verfasser: Perrin, Mathieu Guicquero, William Paille, Bruno et al.

Quelle: IEEE Embedded Systems Letters. 17:42-45

Schlagwörter: Hardware Aware, Bayesian Optimization, [SPI] Engineering Sciences [physics], [SPI.NANO] Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, Quantization, Neural Architecture Search, [INFO.INFO-NE] Computer Science [cs]/Neural and Evolutionary Computing [cs.NE], [INFO.INFO-ES] Computer Science [cs]/Embedded Systems

Zugangs-URL: https://cea.hal.science/cea-04758671v1
https://doi.org/10.1109/les.2024.3434379

Enhancing Neural Architecture Search With Multiple Hardware Constraints for Deep Learning Model Deployment on Tiny IoT Devices

Autoren: Alessio Burrello Matteo Risso Beatrice Alessandra Motetti et al.

Quelle: IEEE Transactions on Emerging Topics in Computing, 12 (3)
IEEE Transactions on Emerging Topics in Computing

Schlagwörter: FOS: Computer and information sciences, Computer Science - Machine Learning, Computing architectures, deep learning, energy-efficiency, hardware -aware NAS, IoT, neural architecture search, TinyML, DNA, Training, Hardware, Costs, Task analysis, Internet of Things, Search problems, Deep Learning, Computing Architectures, Energy-efficiency, Neural Architecture Search, Hardware-aware NAS, Machine Learning (cs.LG)

Dateibeschreibung: application/pdf

Zugangs-URL: http://arxiv.org/abs/2310.07217
https://hdl.handle.net/11585/1004693
https://doi.org/10.1109/TETC.2023.3322033
https://ieeexplore.ieee.org/document/10278089
http://hdl.handle.net/20.500.11850/695332

Compression–Accuracy Co-Optimization Through Hardware-Aware Neural Architecture Search for Vibration Damage Detection

Autoren: Edoardo Ragusa Federica Zonzini Luca De Marchi et al.

Quelle: IEEE Internet of Things Journal. 11:31745-31757

Schlagwörter: Automatic Structural Health Monitoring Compression-accuracy co-optimization Energy profiling Hardware-aware Neural Architecture Search Smart sensor systems

Dateibeschreibung: application/pdf

Zugangs-URL: https://hdl.handle.net/11567/1191337
https://doi.org/10.1109/jiot.2024.3419251
https://hdl.handle.net/11585/972939
https://doi.org/10.1109/jiot.2024.3419251
https://ieeexplore.ieee.org/document/10572266

Editorial: Algorithm-hardware co-optimization in neuromorphic computing for efficient AI

Autoren: Amirreza Yousefzadeh Alberto Patiño-Saucedo Guido De Croon et al.

Quelle: Frontiers in Neuroscience, Vol 19 (2025)

Schlagwörter: neuromorphic computing, algorithm-hardware co-optimization, spiking neural networks (SNNs), temporal efficiency/timestep reduction, hardware-aware mapping and learning, Neurosciences. Biological psychiatry. Neuropsychiatry, RC321-571

Dateibeschreibung: electronic resource

Relation: https://www.frontiersin.org/articles/10.3389/fnins.2025.1746610/full; https://doaj.org/toc/1662-453X

Zugangs-URL: https://doaj.org/article/2bd1465c7b1741d3bbad7ccb5bc1959a

Research on breast tumor segmentation based on the Mamba architecture

Autoren: Weihao Wei Jiacheng Wu Guangming Shao

Quelle: Frontiers in Oncology, Vol 15 (2025)

Schlagwörter: breast tumors, medical image segmentation, Mamba, selective mechanism, hardware-aware algorithm, Neoplasms. Tumors. Oncology. Including cancer and carcinogens, RC254-282

Dateibeschreibung: electronic resource

Relation: https://www.frontiersin.org/articles/10.3389/fonc.2025.1672274/full; https://doaj.org/toc/2234-943X

Zugangs-URL: https://doaj.org/article/5e3c37fc568c40f6ae802f1add29226c

SENSIM: An Event-driven Parallel Simulator for Multi-core Neuromorphic Systems: An Event-driven Parallel Simulator for Multi-core Neuromorphic Systems

Autoren: Nembhani, Prithvish Vadivel, Kanishkan Tang, Guangzhi et al.

Quelle: Nembhani, P, Vadivel, K, Tang, G, Tahghighi, M, van Schaik, G-J, Sifalakis, M, Al-Ars, Z & Yousefzadeh, A 2024, SENSIM : An Event-driven Parallel Simulator for Multi-core Neuromorphic Systems. in IJCNN 2024 Conference Proceedings. IEEE, Piscataway, NJ, 2024 International Joint Conference on Neural Networks, Yokohama, Japan, 30/06/24. https://doi.org/10.1109/ijcnn60899.2024.10651400

Schlagwörter: hardware-aware simulation, SNN/DNN inference, neuromorphic, SENECA, SENSIM

Zugangs-URL: https://research.manchester.ac.uk/en/publications/a99e517d-5584-47a5-ba70-ded5be9f81d8
https://doi.org/10.1109/ijcnn60899.2024.10651400

Multi‐objective evolutionary optimization for hardware‐aware neural network pruning

Autoren: Wenjing Hong Guiying Li Shengcai Liu et al.

Quelle: Fundam Res
Fundamental Research, Vol 4, Iss 4, Pp 941-950 (2024)

Schlagwörter: Multi-objective optimization, Hardware efficiency, Q1-390, Neural network pruning, Science (General), Evolutionary algorithm, 0202 electrical engineering, electronic engineering, information engineering, Hardware-aware machine learning, 02 engineering and technology, Article

Zugangs-URL: https://pubmed.ncbi.nlm.nih.gov/39156574
https://doaj.org/article/d70b6acc734a47ec9205c21f20b76e4b

AI-OPTIMIZED RECONFIGURABLE COMPUTING ARCHITECTURES FOR ADAPTIVE WORKLOAD ACCELERATION IN HETEROGENEOUS SYSTEMS-ON-CHIP: A UNIFIED FRAMEWORK COMBINING DYNAMIC PARTIAL RECONFIGURATION, HARDWARE-AWARE SCHEDULING, AND SELF-ADAPTIVE RESOURCE MANAGEMENT

Autoren: Researcher

Schlagwörter: Dynamic partial reconfiguration, SoC, AI optimization, hardware-aware scheduling, adaptive resource management, heterogeneous systems

Enhancing Efficiency in HAR Models: NAS Meets Pruning

Autoren: Zhou, Yexu King, Tobias Huang, Yiran et al.

Quelle: 2024 IEEE International Conference on Pervasive Computing and Communications Workshops and other Affiliated Events (PerCom Workshops). :33-38

Schlagwörter: ddc:004, human activity recognition, DATA processing & computer science, automated machine learning, hardware-aware neural architecture search

Dateibeschreibung: application/pdf

Zugangs-URL: https://publikationen.bibliothek.kit.edu/1000169356
https://doi.org/10.5445/IR/1000169356
https://publikationen.bibliothek.kit.edu/1000169356/152521635

An Affordable Hardware-Aware Neural Architecture Search for Deploying Convolutional Neural Networks on Ultra-Low-Power Computing Platforms

Autoren: Andrea Mattia Garavagno Edoardo Ragusa Antonio Frisoli et al.

Quelle: IEEE Sensors Letters. 8:1-4

Schlagwörter: Sensor applications, hardware-aware neural architecture search (HW-NAS), TinyML, ultra-low-power computing

Zugangs-URL: https://hdl.handle.net/11567/1206939
https://doi.org/10.1109/LSENS.2024.3387056

Hardware-Aware Neural Architecture Search for Real-Time Video Processing in FPGA-Accelerated Endoscopic Imaging

Autoren: Cunguang Zhang Rui Cui Gang Wang et al.

Quelle: Applied Sciences, Vol 15, Iss 20, p 11200 (2025)

Schlagwörter: FPGA acceleration, neural architecture search, medical endoscopic imaging, hardware-aware optimization, Technology, Engineering (General). Civil engineering (General), TA1-2040, Biology (General), QH301-705.5, Physics, QC1-999, Chemistry, QD1-999

Dateibeschreibung: electronic resource

Relation: https://www.mdpi.com/2076-3417/15/20/11200; https://doaj.org/toc/2076-3417

Zugangs-URL: https://doaj.org/article/253b067c4e224f07a00d7c062a39b977

ColabNAS: Obtaining lightweight task-specific convolutional neural networks following Occam’s razor

Autoren: Andrea Mattia Garavagno Daniele Leonardis Antonio Frisoli

Quelle: Future Generation Computer Systems. 152:152-159

Schlagwörter: FOS: Computer and information sciences, Hardware-aware neural architecture search, Lightweight convolutional neural networks, TinyML, Visual wake words, Computer Vision and Pattern Recognition (cs.CV), Computer Science - Computer Vision and Pattern Recognition, 0202 electrical engineering, electronic engineering, information engineering, 02 engineering and technology

Dateibeschreibung: application/pdf

Zugangs-URL: http://arxiv.org/abs/2212.07700
https://hdl.handle.net/11567/1154977
https://doi.org/10.1016/j.future.2023.11.003
https://hdl.handle.net/11382/574241
https://doi.org/10.1016/j.future.2023.11.003

Pareto Optimization of CNN Models via Hardware-Aware Neural Architecture Search for Drainage Crossing Classification on Resource-Limited Devices

Autoren: Yuke Li Jiwon Baik Md Marufi Rahman et al.

Quelle: Proceedings of the SC '23 Workshops of the International Conference on High Performance Computing, Network, Storage, and Analysis. :1767-1775

Schlagwörter: multiple instructions, pareto optimization, multiple data, computer systems organization, hardware-aware neural architecture search

Dateibeschreibung: Text

A hardware-aware neural architecture search algorithm targeting low-end microcontrollers

Autoren: Garavagno A. M. Ragusa E. Frisoli A. et al.

Quelle: 2023 18th Conference on Ph.D Research in Microelectronics and Electronics (PRIME). :281-284

Schlagwörter: Hardware Aware Neural Architecture Search, TinyML, Microcontrollers, Visual Wake Words, Lightweight Convolutional Neural Networks

Dateibeschreibung: application/pdf

Zugangs-URL: https://hdl.handle.net/11567/1141922
https://doi.org/10.1109/PRIME58259.2023.10161736

RGP Hardware Co-Design: A Quantum-Resistant Foundation for Recursive AI

Autoren: DeepSeek GPT-4.5 van der Erve, Marcus

Schlagwörter: Recursive Gradient Processing, Hardware-Aware AI, Quantum-Resilient AI, AI Safety, TPM, ECC, AF-NS-NAS, Formal Verification, DeepTriad, Gradient Syntax

Relation: https://zenodo.org/communities/rgp-complex-systems/; https://zenodo.org/records/15213348; oai:zenodo.org:15213348; https://doi.org/10.5281/zenodo.15213348

Verfügbarkeit: https://doi.org/10.5281/zenodo.15213348
https://zenodo.org/records/15213348

Hierarchical Network Connectivity and Partitioning for Reconfigurable Large-Scale Neuromorphic Systems

Autoren: Mysore, Nishant Hota, Gopabandhu Deiss, Stephen R et al.

Schlagwörter: Biological Psychology, Biomedical and Clinical Sciences, Neurosciences, Psychology, Affordable and Clean Energy, distributed processing, neuro-inspired computing, brain-scale networks, hierarchical connectivity, network compiler for neuromorphic systems, compute-balanced partitioning, hardware-aware partitioning, Cognitive Sciences, Biological psychology

Dateibeschreibung: application/pdf

Zugangs-URL: https://escholarship.org/uc/item/8x84s7r0
https://escholarship.org/content/qt8x84s7r0/qt8x84s7r0.pdf

Co-Optimization of DNN and Hardware Configurations on Edge GPUs

Autoren: Bouzidi, Halima Ouarnoughi, Hamza Niar, Smail et al.

Weitere Verfasser: Bouzidi, Halima Ouarnoughi, Hamza Niar, Smail et al.

Quelle: 2022 25th Euromicro Conference on Digital System Design (DSD). :398-405

Schlagwörter: Multi-objective optimization, Edge GPU, [INFO.INFO-AR] Computer Science [cs]/Hardware Architecture [cs.AR], Hardware-aware Neural Architecture Search, 0202 electrical engineering, electronic engineering, information engineering, [INFO.INFO-LG] Computer Science [cs]/Machine Learning [cs.LG], 02 engineering and technology, DNN

Dateibeschreibung: application/pdf

Zugangs-URL: https://hal.science/hal-03911415v1
https://hal.science/hal-03911415v1/document
https://doi.org/10.1109/dsd57027.2022.00060

Accelerating and pruning CNNs for semantic segmentation on FPGA

Autoren: Mori, Pierpaolo Vemparala,Manoj-Rohit Fasfous,Nael et al.

Quelle: Proceedings of the 59th ACM/IEEE Design Automation Conference. :145-150

Schlagwörter: 0202 electrical engineering, electronic engineering, information engineering, 02 engineering and technology, hardware aware AI

Dateibeschreibung: application/pdf

Zugangs-URL: https://dl-acm-org.ezproxy.biblio.polito.it/doi/abs/10.1145/3489517.3530424
https://doi.org/10.1145/3489517.3530424
https://hdl.handle.net/11583/2970797

Neural Architecture Search Benchmarks: Insights and Survey

Autoren: Krishna Teja Chitty-Venkata Murali Emani Venkatram Vishwanath et al.

Weitere Verfasser: Krishna Teja Chitty-Venkata Murali Emani Venkatram Vishwanath et al.

Quelle: IEEE Access, Vol 11, Pp 25217-25236 (2023)

Schlagwörter: Neural architecture search benchmarks, convolutional neural networks, Electrical engineering. Electronics. Nuclear engineering, hyperparameter optimization, DegreeDisciplines::Physical Sciences and Mathematics::Computer Sciences::Systems Architecture, LSTM, RNN, hardware-aware neural architecture search, TK1-9971

Dateibeschreibung: application/pdf

Zugangs-URL: https://doaj.org/article/6edeaa7f13dd4788a904c381944614db

Differentiable Neural Architecture, Mixed Precision and Accelerator Co-Search

Autoren: Krishna Teja Chitty-Venkata Yiming Bian Murali Emani et al.

Weitere Verfasser: Krishna Teja Chitty-Venkata Yiming Bian Murali Emani et al.

Quelle: IEEE Access, Vol 11, Pp 106670-106687 (2023)

Schlagwörter: accelerator network co-search, DegreeDisciplines::Engineering, Electrical engineering. Electronics. Nuclear engineering, Mixed precision quantization, hardware-aware neural architecture search, TK1-9971

Dateibeschreibung: application/pdf

Zugangs-URL: https://doaj.org/article/2495076778684d1fa1f37f0873e6a844