Výsledky vyhledávání - "HDL coder"

Rapid Prototyping for Design and Test of FPGA-Based Model Predictive Controllers for Power Converters

Autoři: Purraji, Marziye Zamiri Mamooliraftar, Elyas Sánchez González, Alberto a další

Přispěvatelé: Purraji, Marziye Zamiri Mamooliraftar, Elyas Sánchez González, Alberto a další

Zdroj: Biblos-e Archivo. Repositorio Institucional de la UAM
Universidad Autónoma de Madrid

Témata: Informática, MATLAB HDL Coder, Finite Control Set, Power Electronics, FPGA, Model Predictive Control

Popis souboru: application/pdf

Přístupová URL adresa: http://hdl.handle.net/10486/718450
https://hdl.handle.net/10486/718450
https://doi.org/10.1007/s42835-025-02173-x

Enabling Model-Based Design for Real-Time Spike Detection

Autoři: Di Florio M. Bornat Y. Care M. a další

Zdroj: IEEE Open J Eng Med Biol
IEEE Open Journal of Engineering in Medicine and Biology, Vol 6, Pp 312-319 (2025)

Témata: Signal processing, HDL coder, Computer applications to medicine. Medical informatics, R858-859.7, Medical technology, Field-Programmable Gate Array (FPGA), neuroengineering, R855-855.5, in vivo experiments, Hardware design languages, Software packages, Codes, Field programmable gate arrays, Computer architecture, Hardware, Signal processing algorithms, Neural engineering, Computational modeling, Article

Přístupová URL adresa: https://doaj.org/article/cf365b28a4cd48e6979eede1262981ce

Rapid Prototyping Platform for the Control and Testing of Electric Drives

Autoři: Kozumplík, Miroslav

Témata: Rapid prototyping platform, Simulink, FOC, HDL Coder, PMSM, Two-level voltage source inverter, ZedBoard

Popis souboru: text; application/pdf

Přístupová URL adresa: https://hdl.handle.net/11012/255303

FPGA Design and Implementation for Montgomery Multiplication Algorithm Using MATLAB HDL Coder

Autoři: Ghada Elsayed Eman S. Abass

Zdroj: Bulletin of the National Research Centre, Vol 48, Iss 1, Pp 1-16 (2024)

Témata: Science, MATLAB HDL coder, 02 engineering and technology, Electrical and Computer Engineering, Cryptographic co-processors, HDL coder, Security, 0202 electrical engineering, electronic engineering, information engineering, Computer Engineering, FPGA, Matlab

Přístupová URL adresa: https://doaj.org/article/ba613135c2c14de8b39ee6185e996199

Easy and Straightforward FPGA Implementation of Model Predictive Control Using HDL Coder

Autoři: Marziye Purraji Elyas Zamiri Angel de Castro

Zdroj: Electronics ; Volume 14 ; Issue 3 ; Pages: 419

Témata: Model Predictive Control, field programmable gate arrays, power electronics, HDL Coder, MATLAB simulation

Popis souboru: application/pdf

Relation: Industrial Electronics; https://dx.doi.org/10.3390/electronics14030419

Dostupnost: https://doi.org/10.3390/electronics14030419

FPGA Design and Implementation for Pseudorandom Number Generator based square root (SR-PRNG)

Autoři: Elsayed, Ghada Kayed, Somaya

Zdroj: Journal of International Society for Science and Engineering. 5:8-11

Témata: Computer Engineering, Electrical and Computer Engineering, PRNG FPGA MATLAB HDL CODER

Design of an automatic gain control module for 5G receivers

Autoři: Oliveira, João Pinho

Témata: 5G, 5G NR, AGC, FPGA, HDL Coder, Simulink, VHDL

Popis souboru: application/pdf

Dostupnost: http://hdl.handle.net/10773/41877

Hardware implementation of neural network-based engine model using FPGA

Autoři: Marina Magdy Saady Mohamed Hassan Essai

Zdroj: Alexandria Engineering Journal, Vol 61, Iss 12, Pp 12039-12050 (2022)

Témata: Engine emissions, 0209 industrial biotechnology, HDL coder, 0202 electrical engineering, electronic engineering, information engineering, Back-propagation, 02 engineering and technology, TA1-2040, ANN, Engineering (General). Civil engineering (General), FPGA, Activation function

Přístupová URL adresa: https://doaj.org/article/3086b467fca54a4983cd719ca8e1dd81

FPGA design and implementation for adaptive digital chaotic key generator

Autoři: Ghada Elsayed Elsayed Soleit Somaya Kayed

Zdroj: Bulletin of the National Research Centre, Vol 47, Iss 1, Pp 1-9 (2023)

Témata: FPGA, MATLAB HDL Coder, Chaotic, Science

Popis souboru: electronic resource

Relation: https://doaj.org/toc/2522-8307

Přístupová URL adresa: https://doaj.org/article/aaf02088b3824fd09d9f453f6ee0d604

An Efficient Computer Vision AI Powered Application based Fast Harris Corner Detection Accelerator on Zynq-7000 FPGA

Autoři: Mohammad H Algarni, Taoufik Saidani

Zdroj: International Journal of Intelligent Systems and Applications in Engineering; Vol. 12 No. 3 (2024); 2450-2457

Témata: HDL, HDL Coder, Fast Harris corner detection, Computer vision, Artificial Intelligence, Object Detection

Popis souboru: application/pdf

Přístupová URL adresa: https://www.ijisae.org/index.php/IJISAE/article/view/5716

An optimizing technique for using MATLAB HDL coder

Autoři: Somaya Kayed Ghada Elsayed

Zdroj: Bulletin of the National Research Centre, Vol 47, Iss 1, Pp 1-8 (2023)

Témata: FPGA, MATLAB HDL coder, AES, Science

Popis souboru: electronic resource

Relation: https://doaj.org/toc/2522-8307

Přístupová URL adresa: https://doaj.org/article/bf774f0829ac4be1aa03258662ea7e0c

A Reconfigurable Hardware Realization for Real-Time Simulation of Cardiac Excitation and Conduction

Autoři: Mahmud, Farhanahani Adon, Nur Atiqah Othman, Norliza a další

Zdroj: International Journal of Integrated Engineering; Vol. 16 No. 1 (2024); 272-281 ; 2600-7916 ; 2229-838X

Témata: FPGA, Virtex-6, cardiac excitation, reentrant, Luo-Rudy model, FitzHugh-Nagumo, HDL Coder

Popis souboru: application/pdf

Relation: http://penerbit.uthm.edu.my/ojs/index.php/ijie/article/view/16336/6454; http://penerbit.uthm.edu.my/ojs/index.php/ijie/article/view/16336

Dostupnost: http://penerbit.uthm.edu.my/ojs/index.php/ijie/article/view/16336

Hardware Acceleration for Object Detection using YOLOv5 Deep Learning Algorithm on Xilinx Zynq FPGA Platform

Autoři: Taoufik Saidani Refka Ghodhbani Ahmed Alhomoud a další

Zdroj: Engineering, Technology & Applied Science Research, Vol 14, Iss 1 (2024)

Témata: object detection, YOLOv5, high level synthesis, FPGA, HDL coder, Engineering (General). Civil engineering (General), TA1-2040, Technology (General), T1-995, Information technology, T58.5-58.64

Relation: https://etasr.com/index.php/ETASR/article/view/6761; https://doaj.org/toc/2241-4487; https://doaj.org/toc/1792-8036; https://doaj.org/article/c0ecc16b50654c21ab4c6db78885bb83

Dostupnost: https://doi.org/10.48084/etasr.6761
https://doaj.org/article/c0ecc16b50654c21ab4c6db78885bb83

Model-based Design of a High-Throughput Canny Edge Detection Accelerator on Zynq-7000 FPGA

Autoři: Ahmed Alhomoud Refka Ghodhbani Taoufik Saidani a další

Zdroj: Engineering, Technology & Applied Science Research, Vol 14, Iss 2 (2024)

Témata: FPGA, high-level synthesis, HDL coder, Canny edge detection, image processing, fast prototyping, Engineering (General). Civil engineering (General), TA1-2040, Technology (General), T1-995, Information technology, T58.5-58.64

Relation: https://etasr.com/index.php/ETASR/article/view/7081; https://doaj.org/toc/2241-4487; https://doaj.org/toc/1792-8036; https://doaj.org/article/04316cd32150459da595271c9e3d0caa

Dostupnost: https://doi.org/10.48084/etasr.7081
https://doaj.org/article/04316cd32150459da595271c9e3d0caa

Real Time FPGA Implementation of an Efficient High Speed Harris Corner Detection Algorithm Based on High-Level Synthesis

Autoři: Refka Ghodhbani Taoufik Saidani Ahmed Alhomoud a další

Zdroj: Engineering, Technology & Applied Science Research, Vol 13, Iss 6 (2023)

Témata: rapid prototyping, automated hardware design, corner detection codesign, MBD, HDL coder, Xilinx Zynq-7000, Engineering (General). Civil engineering (General), TA1-2040, Technology (General), T1-995, Information technology, T58.5-58.64

Relation: https://etasr.com/index.php/ETASR/article/view/6406; https://doaj.org/toc/2241-4487; https://doaj.org/toc/1792-8036; https://doaj.org/article/00ad71acc81740108713077783c2f6ca

Dostupnost: https://doi.org/10.48084/etasr.6406
https://doaj.org/article/00ad71acc81740108713077783c2f6ca

FPGA-Based Hardware-in-the-Loop (HIL) Emulation of Power Electronics Circuit Using Device-Level Behavioral Modeling

Autoři: Mohamed Baghdadi Elmostafa Elwarraki Imane Ait Ayad

Zdroj: Designs, Vol 7, Iss 115, p 115 (2023)

Témata: field-programmable gate arrays (FPGAs), power electronic circuit simulation, insulated gate bipolar transistor (IGBT), power diode, HDL coder, hardware-in-the-loop (HIL), Technology, Engineering design, TA174

Relation: https://www.mdpi.com/2411-9660/7/5/115; https://doaj.org/toc/2411-9660; https://doaj.org/article/c53adfe62ca44bb8b44e186a3d260c18

Dostupnost: https://doi.org/10.3390/designs7050115
https://doaj.org/article/c53adfe62ca44bb8b44e186a3d260c18

Prototyping Power Electronics Systems with Zynq-Based Boards Using Matlab/Simulink—A Complete Methodology

Autoři: Caseiro, Luís Miguel Antunes Caires, Diogo Mendes, André

Témata: FPGA, rapid prototyping, Simulink, HDL Coder, Xilinx Zynq, Zedboard

Relation: https://hdl.handle.net/10316/103232

Dostupnost: https://hdl.handle.net/10316/103232
https://doi.org/10.3390/electronics11071130

Computation-efficient and compact FPGA design for a real-time wearable arrhythmia-detector

Autoři: Ria Ghosh Lakshman S. Tamil

Zdroj: Biomedical Engineering Advances, Vol 2, Iss , Pp 100019- (2021)

Témata: Cardiac arrhythmia, Beat classification, Butterworth filtering, ECG sensors, Hardware-utilization, HDL Coder, Medical technology, R855-855.5

Popis souboru: electronic resource

Relation: http://www.sciencedirect.com/science/article/pii/S2667099221000190; https://doaj.org/toc/2667-0992

Přístupová URL adresa: https://doaj.org/article/55bf63e5853543e7b8a0bdc0e77eea5e

Kesir Dereceli Sprott-K Kaotik Sisteminin Dinamik Analizi ve FPGA Uygulaması

Autoři: Altun, Kenan Eğitim Bilimleri Enstitüsü

Přispěvatelé: Altun, Kenan Eğitim Bilimleri Enstitüsü

Zdroj: Issue: 25 392-399
Avrupa Bilim ve Teknoloji Dergisi
European Journal of Science and Technology

Témata: Carlson metodu, Engineering, Kaos, Sprott-K, 0103 physical sciences, HDL kodlayıcı, Mühendislik, kesir-derecesi, FPGA, Kaos, kesir-derecesi, Carlson metodu, Sprott-K, FPGA, HDL kodlayıcı, Chaos, fractional-order, Carlson method, HDL coder, 01 natural sciences

Popis souboru: application/pdf

Přístupová URL adresa: https://dergipark.org.tr/tr/download/article-file/1719767
https://dergipark.org.tr/tr/pub/ejosat/issue/62595/922601
https://dergipark.org.tr/tr/download/article-file/1719767
https://hdl.handle.net/20.500.12418/13526
https://dergipark.org.tr/tr/pub/ejosat/issue/62595/922601

Design of an automatic gain control module for 5G receivers

Autoři: Oliveira, João Pinho Oliveira, Arnaldo Silva Rodrigues de

Přispěvatelé: Oliveira, João Pinho Oliveira, Arnaldo Silva Rodrigues de

Témata: 5G NR, AGC, Simulink, HDL Coder, VHDL, 5G, FPGA

Přístupová URL adresa: http://hdl.handle.net/10773/41877