Výsledky vyhľadávania - "Gate array circuits."

LLIE: Low-Light Image Enhancement Network Based on FPGA.

Autori: Cui, Jiangtao Chen, Guanhua Zhang, Rui a ďalší

Zdroj: Journal of Circuits, Systems & Computers. 11/30/2025, Vol. 34 Issue 17, p1-15. 15p.

Predmety: *IMAGE intensifiers, *GATE array circuits, *IMAGE processing, *PARALLEL algorithms, *HARDWARE

Real-time holographic imaging programmable metasurfaces based on hardware accelerator computation.

Autori: Cheng, Haoliang Yang, Yunyun Gu, Manna a ďalší

Zdroj: Precision Engineering. Aug2025, Vol. 95, p495-504. 10p.

Predmety: *ELECTROMAGNETIC waves, *GATE array circuits, *DIODES, *ENCODING, *HARDWARE

Impact of reduced common mode voltage-PWM techniques on stator winding temperature using reliable thermal model: theoretical and experimental studies.

Autori: Ben Mahmoud, Zouhaira Guenenna, Thouraya Khedher, Adel

Zdroj: COMPEL. 2025, Vol. 44 Issue 4, p597-614. 18p.

Predmety: *TEMPERATURE control, *GATE array circuits, *STRAY currents, *IDEAL sources (Electric circuits), *MAINTENANCE costs, *PULSE width modulation, *SYSTEM downtime

A novel ADE system with tunable droplet size and ejection height.

Autori: Shen, Shih-Hung Lian, Han-Wei Huang, Yu-Wen a ďalší

Zdroj: Journal of Applied Physics. 3/28/2024, Vol. 135 Issue 12, p1-13. 13p.

Predmety: *ACOUSTIC surface waves, *GATE array circuits

Real-time FPGA-based architecture for assessing alertness and circadian disruptions using the Choice Reaction Test (CRT).

Autori: Panda, Nidhi Gupta, Supratim Baig, Mahammad a ďalší

Zdroj: Biological Rhythm Research. Jun2025, Vol. 56 Issue 6, p451-463. 13p.

Predmety: *SLEEP deprivation, *GATE array circuits, *WAKEFULNESS, *PROFESSIONS, *HARDWARE

On the Harmonic Locking of Ring Oscillators under Single ElectroMagnetic Pulsed Fault Injection in FPGAs.

Autori: El Amraoui, Sami Douadi, Aghiles Leveugle, Régis a ďalší

Zdroj: Journal of Electronic Testing. Jun2025, Vol. 41 Issue 3, p257-272. 16p.

Predmety: *RANDOM number generators, *GATE array circuits, *PHYSICAL mobility, *VOLTAGE, *LOGIC

A Reconfigurable Framework for Hybrid Quantum–Classical Computing.

Autori: Pratibha Mahmud, Naveed

Zdroj: Algorithms. May2025, Vol. 18 Issue 5, p271. 21p.

Predmety: *GATE array circuits, *SOFTWARE frameworks, *ALGORITHMS, *COMPUTER software, *CLASSIFICATION

Heterogeneous Tapped Delay-Line Time-to-Digital Converter on Artix-7 FPGA.

Autori: Chen, Riguang Chen, Ping Li, Kuinian a ďalší

Zdroj: Sensors (14248220). May2025, Vol. 25 Issue 9, p2923. 15p.

Predmety: *TIME-digital conversion, *GATE array circuits, *TIME-of-flight measurements, *DELAY lines, *PHYSICS experiments

Hardware-Accelerated Non-Contact System for Sleep Disorder Monitoring and Analysis.

Autori: Sravanthi, Mangali Gunturi, Sravan Kumar Chinnaiah, Mangali Chinna a ďalší

Zdroj: Sensors (14248220). May2025, Vol. 25 Issue 9, p2747. 17p.

Predmety: *RANDOM forest algorithms, *GATE array circuits, *MOVEMENT disorders, *SLEEP disorders, *SLEEP

A Reconfigurable Digital Beamformer Implemented on a Field-Programmable Gate Array for Real-Time and Resource-Efficient Direction-of-Arrival Estimation.

Autori: Wang, Yuting Zhu, Liyuan Wu, Tianxiang a ďalší

Zdroj: Sensors (14248220). Apr2025, Vol. 25 Issue 8, p2497. 19p.

Predmety: *DIRECTION of arrival estimation, *GATE array circuits, *PHASED array antennas, *SIGNAL processing, *RECEIVING antennas

Self-Replication in a Mathematical Model of Particle Movement in Fluids, with Its Hardware Implementation.

Autori: Dlamini, Anastacia Goufo, Emile Franc Doungmo

Zdroj: International Journal of Bifurcation & Chaos in Applied Sciences & Engineering. Apr2025, Vol. 35 Issue 5, p1-22. 22p.

Predmety: *GATE array circuits, *CHAOS theory, *FLUID dynamics, *COMPLEX fluids, *AUTOPOIESIS

An optimized hardware implementation of SHA-256 round computation.

Autori: Yao, Maoqun Xue, Ziwei Li, Haiwei a ďalší

Zdroj: Computer Journal. Apr2025, Vol. 68 Issue 4, p355-359. 5p.

Predmety: *GATE array circuits, *ALGORITHMS, *COMPRESSORS, *HARDWARE

基于三维混沌系统的图像加密及FPGA实现.

Alternate Title: Image encryption and FPGA implementation based on 3D chaotic system.

Autori: 闫少辉 姜嘉伟 崔 宇

Zdroj: Computer Engineering & Science / Jisuanji Gongcheng yu Kexue. Apr2025, Vol. 47 Issue 4, p686-694. 9p.

Predmety: *IMAGE encryption, *GATE array circuits, *SYSTEMS software, *SOFTWARE architecture, *TIMING circuits

Toward an FPGA-based dedicated computer for molecular dynamics simulations.

Autori: Hamm, Peter

Zdroj: Journal of Chemical Physics; 2/7/2025, Vol. 162 Issue 5, p1-14, 14p

Predmety: MOLECULAR dynamics, SUPERCOOLED liquids, GATE array circuits, THERMOSTAT, TORUS

Enhanced Reliability and Stability of FPGA-Based PUF-IDG-IoT.

Autori: Dahir, Ubaid Mohamed Hashi, Abdirahman Osman Abdirahman, Abdullahi Ahmed a ďalší

Zdroj: Ingénierie des Systèmes d'Information. Oct2024, Vol. 29 Issue 5, p1867-1879. 13p.

Predmety: GATE array circuits, PHYSICAL mobility, HARDWARE

Novel optimized implementations for the Piccolo cipher based on field‐programmable gate arrays.

Autori: Feng, Jingya Wei, Yongzhuang Wei, Bohua

Zdroj: International Journal of Circuit Theory & Applications. Feb2025, Vol. 53 Issue 2, p771-789. 19p.

Predmety: *GATE array circuits, *DATA security, *INTERNET of things, *BLOCK designs, *CIPHERS, *BLOCK ciphers, *LOGIC circuits

Strongly perturbed bondorbital attractors for generalized systems.

Autori: Dlamini, A. Doungmo Goufo, E. F. Khumalo, M.

Zdroj: Chaos. Feb2025, Vol. 35 Issue 2, p1-15. 15p.

Predmety: *GATE array circuits, *FRACTIONAL calculus, *DIFFERENTIAL equations, *SYSTEM dynamics, *HARDWARE

On-Satellite Implementation of Real-Time Multi-Object Moving Vehicle Tracking with Complex Moving Backgrounds.

Autori: Yu, Jingyi Wei, Siyuan Wen, Yuxiao a ďalší

Zdroj: Remote Sensing. Feb2025, Vol. 17 Issue 3, p418. 28p.

Predmety: *AFFINE transformations, *GATE array circuits, *RELATIVE motion, *INFORMATION processing, *PIXELS, *ARTIFICIAL satellite tracking

FPGA-based process, voltage, and temperature insensitive picosecond resolution timing generators with offset correction for automatic test equipment.

Autori: Guo, Zeyu Gui, Liangqi Sheng, Kai

Zdroj: Review of Scientific Instruments. Feb2025, Vol. 96 Issue 2, p1-11. 11p.

Predmety: *GATE array circuits, *TIME management, *VOLTAGE, *INTERPOLATION, *TEMPERATURE

Dynamic Analysis and Implementation of FPGA for a New 4D Fractional-Order Memristive Hopfield Neural Network.

Autori: Yu, Fei Zhang, Shankou Su, Dan a ďalší

Zdroj: Fractal & Fractional. Feb2025, Vol. 9 Issue 2, p115. 20p.

Predmety: *HOPFIELD networks, *GATE array circuits, *LYAPUNOV exponents, *BIFURCATION diagrams, *DECOMPOSITION method