Výsledky vyhľadávania - "FPGA Programming"

Programming Heterogeneous Hardware via Managed Runtime Systems

Autori: Fumero Alfonso, Juan Stratikopoulos, Athanasios Kotselidis, Christos-Efthymios

Zdroj: SpringerBriefs in Computer Science ISBN: 9783031495588
Fumero Alfonso, J, Stratikopoulos, A & Kotselidis, C-E 2024, Programming Heterogeneous Hardware via Managed Runtime Systems. SpringerBriefs in Computer Science, Springer Nature.

Predmety: FPGA Programming, Programming Languages, GPU Programming, Computer Hardware Acceleration, Java, Managed Runtime Systems, Python

Prístupová URL adresa: https://research.manchester.ac.uk/en/publications/3989a55d-6005-4523-ac7c-43a753a39f01
https://link.springer.com/book/10.1007/978-3-031-49559-5
https://research.manchester.ac.uk/en/publications/3989a55d-6005-4523-ac7c-43a753a39f01

Data Parallel C++

Autori: Reinders, James Ashbaugh, Ben Brodman, James a ďalší

Predmety: heterogenous, FPGA programming, GPU programming, Parallel programming, Data parallelism, SYCL, Intel One API

Popis súboru: application/pdf

Prístupová URL adresa: https://library.oapen.org/handle/20.500.12657/76704

Data Parallel C++: Programming Accelerated Systems Using C++ and SYCL

Autori: Reinders, James Ashbaugh, Ben Brodman, James a ďalší

Predmety: SYCL, Data parallelism, Intel One API, Parallel programming, GPU programming, FPGA programming, heterogenous

Popis súboru: image/jpeg; application/pdf

Prístupová URL adresa: https://directory.doabooks.org/handle/20.500.12854/117557
https://library.oapen.org/handle/20.500.12657/76704
https://library.oapen.org/bitstream/20.500.12657/76704/1/978-1-4842-9691-2.pdf
https://library.oapen.org/handle/20.500.12657/76704
https://link.springer.com/978-1-4842-9691-2

AXIOM: A Scalable, Efficient and Reconfigurable Embedded Platform

Autori: Giorgi R. Procaccini M. Khalili F.

Zdroj: 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE). :480-485

Predmety: 0202 electrical engineering, electronic engineering, information engineering, Cyber-Physical Systems, Reconfigurable Systems, FPGA Programming, Thread Level Parallelization, Energy Efficiency, Embedded Systems, 02 engineering and technology

Popis súboru: application/pdf

Prístupová URL adresa: https://usiena-air.unisi.it/handle/11365/1069322
https://dblp.uni-trier.de/db/conf/date/date2019.html#GiorgiPK19
https://doi.org/10.23919/DATE.2019.8715168

Fast neural network inference on FPGAs for triggering on long-lived particles at colliders

Autori: Coccaro, Andrea Armando Di Bello, Francesco Giagu, Stefano a ďalší

Prispievatelia: Coccaro, Andrea Armando Di Bello, Francesco Giagu, Stefano a ďalší

Predmety: particle physic, trigger and data acquisition system, machine learning, fast inference, FPGA programming

Relation: info:eu-repo/semantics/altIdentifier/wos/WOS:001110274500001; volume:4; issue:4; numberofpages:9; journal:MACHINE LEARNING: SCIENCE AND TECHNOLOGY; https://hdl.handle.net/11573/1716140

Dostupnosť: https://hdl.handle.net/11573/1716140
https://doi.org/10.1088/2632-2153/ad087a

Energy Efficiency Exploration on the ZYNQ Ultrascale+

Autori: Giorgi, Roberto Khalili, Farnam Procaccini, Marco

Zdroj: 2018 30th International Conference on Microelectronics (ICM). :48-54

Predmety: Cyber-Physical Systems, Reconfigurable Systems, FPGA Programming, Thread Level Parallelization, Energy Evaluation, 0202 electrical engineering, electronic engineering, information engineering, 02 engineering and technology, 7. Clean energy

Popis súboru: application/pdf

Prístupová URL adresa: https://dblp.uni-trier.de/db/conf/icm2/icm2018.html#GiorgiKP18
https://usiena-air.unisi.it/handle/11365/1069324

OpenCL HLS Based Design of FPGA Accelerators for Cryptographic Primitives

Autori: A. Barenghi M. Madaschi N. Mainardi a ďalší

Zdroj: 2018 International Conference on High Performance Computing & Simulation (HPCS)

Predmety: 0211 other engineering and technologies, 0202 electrical engineering, electronic engineering, information engineering, OpenCL, High-throughput Cryptographic Implementations, High Level Synthesis, Electronic System-level Synthesis, FPGA, Programming practices, 02 engineering and technology, 7. Clean energy

Popis súboru: application/pdf

Data Parallel C++: Mastering DPC++ for Programming of Heterogeneous Systems using C++ and SYCL

Autori: Reinders, James Ashbaugh, Ben Brodman, James a ďalší

Zdroj: 2021_Book_DataParallelC.pdf

Predmety: SYCL, Data parallelism, Intel One API, Maker, Programming & scripting languages: general, Programming Languages, Compilers, Interpreters, Parallel programming, thema EDItEUR::U Computing and Information Technology::UK Computer hardware, Computer hardware, GPU programming, FPGA programming, heterogenous, Lenguajes de programación (Computadores electrónicos), Compilers, Interpreters, C (Lenguaje de programación de computadores), Programming Languages, Hardware and Maker, Compilers & interpreters, Lenguas artificiales, thema EDItEUR::U Computing and Information Technology::UM Computer programming / software engineering::UMX Programming and scripting languages: general

Popis súboru: image/jpeg; application/pdf; 548 páginas

Prístupová URL adresa: https://directory.doabooks.org/handle/20.500.12854/30305
https://library.oapen.org/bitstream/20.500.12657/42917/1/2021_Book_DataParallelC.pdf
https://library.oapen.org/handle/20.500.12657/42917
https://www.springer.com/9781484255742
https://library.oapen.org/handle/20.500.12657/42917

Power quality meter based on FPGA and LabVIEW

Autori: I. Simic J. A. Bosnic Goran Petrović a ďalší

Prispievatelia: I. Simic J. A. Bosnic Goran Petrović a ďalší

Zdroj: 2017 11th International Conference on Measurement. :151-154

Predmety: 0103 physical sciences, 0202 electrical engineering, electronic engineering, information engineering, 02 engineering and technology, Power Quality, Signal processing, FPGA programming, 01 natural sciences

Prístupová URL adresa: https://www.bib.irb.hr/880426
https://ieeexplore.ieee.org/abstract/document/7983558/

FlexiS —A Flexible Sensor Node Platform for the Internet of Things

Autori: Duc Minh Pham Syed Mahfuzul Aziz

Zdroj: Sensors, Vol 21, Iss 15, p 5154 (2021)

Predmety: Internet of Things (IoT), wireless sensor networks (WSN), sensor node, field-programmable gate array (FPGA), FPGA programming, energy efficiency, Chemical technology, TP1-1185

Relation: https://www.mdpi.com/1424-8220/21/15/5154; https://doaj.org/toc/1424-8220; https://doaj.org/article/f8268c652e3142f29a660811a68abd69

Dostupnosť: https://doi.org/10.3390/s21155154
https://doaj.org/article/f8268c652e3142f29a660811a68abd69

Data Parallel C++

Autori: Reinders, James Ashbaugh, Ben Brodman, James a ďalší

Predmety: Programming Languages, Compilers, Interpreters, Hardware and Maker, Maker, heterogenous, FPGA programming, GPU programming, Parallel programming, Data parallelism, SYCL, Intel One API, Programming & scripting languages: general, Compilers & interpreters, Computer hardware, Programming and scripting languages: general

Popis súboru: application/pdf

Prístupová URL adresa: https://library.oapen.org/handle/20.500.12657/42917

Scalable Embedded Systems: Towards the Convergence of High-Performance and Embedded Computing

Autori: Giorgi, Roberto

Zdroj: 2015 IEEE 13th International Conference on Embedded and Ubiquitous Computing. :148-153

Predmety: 0202 electrical engineering, electronic engineering, information engineering, 02 engineering and technology, 7. Clean energy, Cyber-Physical Systems, Reconfigurable Systems, Cluster Programming, FPGA Programming, Distributed Shared Memory, Programming Model, Performance Evaluation

Popis súboru: application/pdf

Prístupová URL adresa: https://ieeexplore.ieee.org/document/7363629/
https://usiena-air.unisi.it/handle/11365/1003104
https://dblp.uni-trier.de/db/conf/euc/euc2015.html#Giorgi15
http://ieeexplore.ieee.org/document/7363629/
https://www.axiom-project.eu/wp-content/uploads/2015/08/giorgi151023-euc-v4.pdf

The AXIOM Software Layers

Autori: Alvarez, C. Ayguade, E. Bueno, J. a ďalší

Prispievatelia: Alvarez, C. Ayguade, E. Bueno, J. a ďalší

Zdroj: UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
Recercat. Dipósit de la Recerca de Catalunya
instname

Predmety: Smart Home, Matrius de portes programables per l'usuari, Cyber-physical systems, Field programmable gate arrays, 02 engineering and technology, Enginyeria de la telecomunicació [Àrees temàtiques de la UPC], Distributed Shared Memory, 3. Good health, Cluster Programming, FPGA Programming, OmpSs, Smart Video-surveillance, Informàtica [Àrees temàtiques de la UPC], 0202 electrical engineering, electronic engineering, information engineering, Àrees temàtiques de la UPC::Informàtica, Àrees temàtiques de la UPC::Enginyeria de la telecomunicació

Popis súboru: application/pdf

Prístupová URL adresa: http://hdl.handle.net/2117/99178
https://hdl.handle.net/2117/99178
https://doi.org/10.1109/dsd.2015.52

The AXIOM software layers

Autori: Álvarez, Carlos Ayguadé Parra, Eduard Bosch Pons, Jaume a ďalší

Prispievatelia: Álvarez, Carlos Ayguadé Parra, Eduard Bosch Pons, Jaume a ďalší

Zdroj: Recercat. Dipósit de la Recerca de Catalunya
instname
UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
ELSEVIER Microprocessors and Microsystems

Predmety: Parallel processing (Electronic computers), Distributed shared memory, Computer Networks and Communications, Cyber-physical systems, Processament en paral·lel (Ordinadors), Cluster programming, 02 engineering and technology, FPGA Programming, Smart video-surveillance, Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors::Arquitectures paral·leles, Ompss, Smart home, Hardware and Architecture, Artificial Intelligence, Informàtica [Àrees temàtiques de la UPC], Smart Video-surveillance, Microprocessadors, 0202 electrical engineering, electronic engineering, information engineering, Àrees temàtiques de la UPC::Informàtica, Informàtica::Arquitectura de computadors::Arquitectures paral·leles [Àrees temàtiques de la UPC], Microprocessors, Software

Popis súboru: application/pdf; ELETTRONICO

Prístupová URL adresa: http://hdl.handle.net/2117/99698

Harnessing the power of reconfigurable computing platforms

Autori: Navaridas, Javier

Predmety: Programación de ordenadores, Reconfigurable devices, FPGA programming

Relation: Charla de Javier Navaridas sobre FPGAs; Malaga, España; 14 noviembre 2016; http://hdl.handle.net/10630/12397

Dostupnosť: http://hdl.handle.net/10630/12397

Power quality meter based on FPGA and LabVIEW

Autori: Mostarac, Petar Bosnić, Juraj Alojzije Petrović, Goran

Predmety: Signal processing, Power Quality, FPGA programming

Data Parallel C++ ; 978-1-4842-9691-2.pdf

Autori: Reinders, James Ashbaugh, Ben Brodman, James a ďalší

Predmety: heterogenous, FPGA programming, GPU programming, Parallel programming, Data parallelism, SYCL, Intel One API

Popis súboru: application/pdf

Relation: ONIX_20231013_9781484296912_4; OCN: 1403550971

Dostupnosť: https://library.oapen.org/handle/20.500.12657/76704
https://hdl.handle.net/20.500.12657/76704
https://link.springer.com/978-1-4842-9691-2

Building a photonic tensor core unit with an electronic interface for convolution processing

Autori: Pradip, Ravi Universitat Politècnica de Catalunya. Departament de Física Cojocaru, Crina a ďalší

Prispievatelia: Pradip, Ravi Universitat Politècnica de Catalunya. Departament de Física Cojocaru, Crina a ďalší

Predmety: Àrees temàtiques de la UPC::Enginyeria de la telecomunicació::Telecomunicació òptica::Fotònica, Photonics, Data sets, Photonic computing, Neuromorphic computing, FPGA programming, Fotònica, Conjunts de dades

Popis súboru: application/pdf

Relation: http://hdl.handle.net/2117/388358

Dostupnosť: http://hdl.handle.net/2117/388358

Data Parallel C++

Autori: Reinders, James Ashbaugh, Ben Brodman, James a ďalší

Predmety: Programming Languages, Compilers, Interpreters, Hardware and Maker, Maker, heterogenous, FPGA programming, GPU programming, Parallel programming, Data parallelism, SYCL, Intel One API, Programming & scripting languages: general, Compilers & interpreters, Computer hardware, thema EDItEUR::U Computing and Information Technology::UM Computer programming / software engineering::UMX Programming and scripting languages: general, thema EDItEUR::U Computing and Information Technology::UK Computer hardware

Popis súboru: image/jpeg

Relation: ONIX_20201113_9781484255742_23; OCN: 1204226016; https://library.oapen.org/handle/20.500.12657/42917; https://library.oapen.org/bitstream/20.500.12657/42917/1/2021_Book_DataParallelC.pdf

Dostupnosť: https://library.oapen.org/handle/20.500.12657/42917
https://hdl.handle.net/20.500.12657/42917
https://directory.doabooks.org/handle/20.500.12854/30305
https://hdl.handle.net/20.500.12854/30305
https://library.oapen.org/bitstream/20.500.12657/42917/1/2021_Book_DataParallelC.pdf

Data Parallel C++ ; 2021_Book_DataParallelC.pdf

Autori: Reinders, James Ashbaugh, Ben Brodman, James a ďalší

Predmety: Programming Languages, Compilers, Interpreters, Hardware and Maker, Maker, heterogenous, FPGA programming, GPU programming, Parallel programming, Data parallelism, SYCL, Intel One API, Programming & scripting languages: general, Compilers & interpreters, Computer hardware

Popis súboru: application/pdf

Relation: ONIX_20201113_9781484255742_23; OCN: 1204226016; https://www.springer.com/9781484255742

Dostupnosť: https://library.oapen.org/handle/20.500.12657/42917
https://hdl.handle.net/20.500.12657/42917
https://www.springer.com/9781484255742