Výsledky vyhľadávania - "FIELD programmable gate arrays"

FPGA-Deployable PCNN-Based Neural Network Implementation for Real-Time Speech Recognition.

Autori: Zhu, Hui-Sheng¹ (AUTHOR) djkzhs001@163.com

Zdroj: International Journal of Computational Intelligence & Applications. Nov2025, p1. 22p. 12 Illustrations.

Predmety: *ARTIFICIAL neural networks, *REAL-time computing, SIGNAL denoising, FIELD programmable gate arrays, EMBEDDED computer systems, FEATURE extraction, SPEECH perception

STEP-NC compliant 3-axis CNC machine controller based on Field-Programmable Gate Arrays.

Autori: Zafar, Zubaid Ali Abbas, Tanveer Rafiq, Mudassar a ďalší

Zdroj: International Journal of Computer Integrated Manufacturing. Oct2025, Vol. 38 Issue 10, p1345-1363. 19p.

Predmety: *STANDARDIZATION, *REAL-time computing, NUMERICAL control of machine tools, FIELD programmable gate arrays, FINITE state machines

Design an intelligent solar SPWM inverter based on FPGA.

Autori: Aldahhan, Murtadha R. S. Akkar, Hanan A. R.

Zdroj: AIP Conference Proceedings. 2025, Vol. 3350 Issue 1, p1-17. 17p.

Predmety: *DC-AC converters, *FIELD programmable gate arrays, *MACHINE learning, *ALTERNATING currents, *HARMONIC distortion (Physics), *PHOTOVOLTAIC power generation, *MECHANICAL efficiency, *PULSE width modulation

Real-time gamma-neutron discrimination with a trainable polynomial kernel.

Autori: Hlavinka, Matyáš Matĕj, Zdenĕk Čulen, Jiří a ďalší

Zdroj: EPJ Web of Conferences. 11/6/2025, Vol. 338, p1-7. 7p.

Predmety: *SUPPORT vector machines, *FIELD programmable gate arrays, *CUBIC equations, *REAL-time computing, *SIGNAL separation, *NEUTRON counters

Compiler-Driven FPGA Virtualization with SYNERGY.

Autori: Landgraf, Joshua Yang, Tiffany Lin, Will a ďalší

Zdroj: Communications of the ACM. Aug2024, Vol. 67 Issue 8, p134-142. 9p.

Predmety: *VIRTUAL machine systems, *COMPUTER operating systems, FIELD programmable gate arrays, SOFTWARE architecture, DATA distribution, WORKLOAD of computer networks, VERILOG (Computer hardware description language)

Design and implementation of low power multiplierless FIR filters on FPGA and ASIC.

Autori: Soni, Teena Kumar, A. Sharma, Ila a ďalší

Zdroj: International Journal of Electronics. Sep2025, Vol. 112 Issue 9, p1964-1986. 23p.

Predmety: *ENERGY consumption, FIELD programmable gate arrays, FINITE impulse response filters, ELECTRIC power consumption, GREY Wolf Optimizer algorithm, STATISTICAL measurement, OPTIMIZATION algorithms, APPLICATION-specific integrated circuits

A Survey of Hardware-Based AES SBoxes: Area, Performance, and Security.

Autori: Curlin, Phaedra Sophia Heiges, Jeff Chan, Calvin a ďalší

Zdroj: ACM Computing Surveys. Sep2025, Vol. 57 Issue 9, p1-37. 37p.

Predmety: *ADVANCED Encryption Standard, *DATA encryption, VERY large scale circuit integration, FIELD programmable gate arrays, BLOCK ciphers, SOLID state drives

A Codesign Framework for the Development of Next Generation Wearable Computing Systems.

Autori: Porreca, Francesco Frustaci, Fabio Gravina, Raffaele

Zdroj: Sensors (14248220). Nov2025, Vol. 25 Issue 21, p6624. 22p.

Predmety: *WEARABLE technology, *FIELD programmable gate arrays, *ENERGY consumption, *SIGNAL processing, *EDGE computing, *GREEN technology, *MICROCONTROLLERS, *CONCURRENT engineering

Filter-Wise Mask Pruning and FPGA Acceleration for Object Classification and Detection.

Autori: He, Wenjing Mei, Shaohui Hu, Jian a ďalší

Zdroj: Remote Sensing. Nov2025, Vol. 17 Issue 21, p3582. 27p.

Predmety: *CONVOLUTIONAL neural networks, *FIELD programmable gate arrays, *REAL-time computing, *OBJECT recognition (Computer vision), *REMOTE sensing

FPGA acceleration and IC mask optimization based on deep learning.

Autori: Liu, Yuzhang¹ (AUTHOR) yp8602@163.com

Zdroj: Journal of Computational Methods in Sciences & Engineering. Nov2025, Vol. 25 Issue 6, p5304-5314. 11p.

Predmety: *DEEP learning, *FIELD programmable gate arrays, *MACHINE learning, *GENERATIVE adversarial networks, *OPTIMIZATION algorithms, *INTEGRATED circuit layout

Design of the New Classic and Quantum Chaotic Maps and Implementation on FPGA.

Autori: Ors Yalcin, Berna Hematpour, Nafiseh Faruk Birgul, Omer

Zdroj: Arabian Journal for Science & Engineering (Springer Science & Business Media B.V. ). Nov2025, Vol. 50 Issue 21, p17441-17487. 47p.

Predmety: *QUANTUM cryptography, *FIELD programmable gate arrays, *DYNAMICAL systems, *MATHEMATICAL mappings, *COMPUTATIONAL complexity, *COMPUTER hardware description languages

Reviews & Products: SIMULINK (Computer software)

Efficient FPGA implementation of polar codes-based information reconciliation for quantum key distribution.

Autori: Liao, Lianye Wu, Xinyi Chen, Ye a ďalší

Zdroj: Scientific Reports. 10/16/2025, Vol. 15 Issue 1, p1-12. 12p.

Predmety: *FIELD programmable gate arrays, *QUANTUM cryptography, *DECODING algorithms, *HARDWARE, *MECHANICAL efficiency, *ECONOMIC efficiency, *CHANNEL coding

Osoby: SHANNON, Claude Elwood, 1916-2001

Design and Implementation of a YOLOv2 Accelerator on a Zynq-7000 FPGA.

Autori: Kim, Huimin Kim, Tae-Kyoung

Zdroj: Sensors (14248220). Oct2025, Vol. 25 Issue 20, p6359. 23p.

Predmety: *OBJECT recognition (Computer vision), *FIELD programmable gate arrays, *SIGNAL quantization, *SYSTEMS on a chip, *MECHANICAL efficiency

Convolutional Neural Network Acceleration Techniques Based on FPGA Platforms: Principles, Methods, and Challenges.

Autori: Gao, Li Luo, Zhongqiang Wang, Lin

Zdroj: Information. Oct2025, Vol. 16 Issue 10, p914. 59p.

Predmety: *CONVOLUTIONAL neural networks, *FIELD programmable gate arrays, *MATHEMATICAL optimization, *SCALABILITY, *PARALLEL processing, *BENCHMARK problems (Computer science)

Efficient CNN Accelerator Based on Low-End FPGA with Optimized Depthwise Separable Convolutions and Squeeze-and-Excite Modules.

Autori: Shen, Jiahe Cheng, Xiyuan Yang, Xinyu a ďalší

Zdroj: AI. Oct2025, Vol. 6 Issue 10, p244. 19p.

Predmety: *CONVOLUTIONAL neural networks, *FIELD programmable gate arrays, *COPROCESSORS, *RESOURCE allocation, *HARDWARE, *PROCESS optimization

面向FPGA 模拟加速的状态存储和策略映射技术研究.

Alternate Title: Research on state storage and strategic mapping techniques for FPGA-accelerated simulation.

Autori: 荣培涛 曾 坤 李 开 a ďalší

Zdroj: Computer Engineering & Science / Jisuanji Gongcheng yu Kexue. Oct2025, Vol. 47 Issue 10, p1726-1736. 11p.

Predmety: *FIELD programmable gate arrays, *RESOURCE management, *RESOURCE allocation, *SIMULATION software, *EMULATION software

Efficient Parallel Hardware Architecture for GF(p) Elliptic Curve Point Multiplication on FPGA.

Autori: Wu, Ruoyu Yu, Binchao Chen, Zhaofeng a ďalší

Zdroj: International Journal of Circuit Theory & Applications. Oct2025, Vol. 53 Issue 10, p5839-5850. 12p.

Predmety: *ELLIPTIC curve cryptography, *FIELD programmable gate arrays, *MODULAR arithmetic, *PARALLEL computers, *HIGH performance computing, *ELLIPTIC curves, *DATA pipelining

Wideband sound reproduction using a massive multi-channel focusing parametric array loudspeaker system.

Autori: Zhuang, Tao Li, Mengtong Li, Shaozhe a ďalší

Zdroj: Journal of the Acoustical Society of America. Oct2025, Vol. 158 Issue 4, p3339-3347. 9p.

Predmety: *FIELD programmable gate arrays, *LOUDSPEAKERS, *ACOUSTIC field, *HIGH-fidelity sound systems, *ACOUSTIC arrays, *ULTRASONIC waves, *DESIGN

Design and implementation of multi-channel high-precision and large dynamic range data acquisition system.

Autori: Wang, Guanlin Wei, Guofu

Zdroj: Review of Scientific Instruments. Oct2025, Vol. 96 Issue 10, p1-12. 12p.

Predmety: *DATA acquisition systems, *FIELD programmable gate arrays, *ACQUISITION of data, *MEASUREMENT, *COMPUTER performance, *ALGORITHMS, *SIGNAL processing

SpiRec: Soft-Logic Architecture Exploration of Reconfigurable Systems for Spiking Neural Networks: Soft-Logic Architecture Exploration of Reconfigurable Systems for Spiking Neural Networks

Autori: Lai, Xunqin Corradi, Federico Sahoo, Siva Satyendra

Zdroj: 2025 IEEE 36th International Conference on Application-specific Systems, Architectures and Processors (ASAP). :109-116

Predmety: Artificial intelligence, Spiking neural networks, Logic, Field Programmable Gate Arrays, Resource management, Field programmable gate arrays, Logic gates, AI Computing, Spiking Neural Networks, Reconfigurable Architectures, Computer architecture, Delays, Systems architecture, Routing