Výsledky vyhledávání - "DRNTU::Engineering::Computer science and engineering::Hardware::Logic design"
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Témata: DRNTU::Engineering::Computer science and engineering::Computer systems organization::Special-purpose and application-based systems, DRNTU::Engineering::Computer science and engineering::Hardware::Control structures and microprogramming, Engineering::Computer science and engineering::Computer systems organization::Special-purpose and application-based systems [DRNTU], Engineering::Computer science and engineering::Hardware::Control structures and microprogramming [DRNTU], DRNTU::Engineering::Computer science and engineering::Computer systems organization::Processor architectures, DRNTU::Engineering::Computer science and engineering::Hardware::Logic design, Engineering::Computer science and engineering::Hardware::Logic design [DRNTU], Engineering::Computer science and engineering::Computer systems organization::Processor architectures [DRNTU]
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Témata: DRNTU::Engineering::Computer science and engineering::Hardware::Logic design, Engineering::Computer science and engineering::Hardware::Logic design [DRNTU]
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Témata: Engineering::Computer science and engineering::Hardware::Memory structures [DRNTU], DRNTU::Engineering::Computer science and engineering::Hardware::Logic design, DRNTU::Engineering::Computer science and engineering::Hardware::Memory structures, Engineering::Computer science and engineering::Hardware::Logic design [DRNTU]
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Relation: IEEE transactions on very large scale integration (VLSI) systems; https://hdl.handle.net/10356/99851; https://hdl.handle.net/10220/16544
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Témata: DRNTU::Engineering::Electrical and electronic engineering::Wireless communication systems, DRNTU::Engineering::Electrical and electronic engineering::Electronic systems::Signal processing, DRNTU::Engineering::Computer science and engineering::Hardware::Arithmetic and logic structures, DRNTU::Engineering::Computer science and engineering::Hardware::Logic design
Popis souboru: 172 p.; application/pdf
Relation: Syed Naveen Altaf Ahmed. (2018). Hardware efficient algorithms and architectures for burst communications in cognitive radios. Doctoral thesis, Nanyang Technological University, Singapore.; https://hdl.handle.net/10356/74185
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Popis souboru: 54 p.; application/pdf
Relation: https://hdl.handle.net/10356/62672
Dostupnost: https://hdl.handle.net/10356/62672
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Témata: DRNTU::Engineering::Computer science and engineering::Hardware::Logic design, DRNTU::Engineering::Computer science and engineering::Computer systems organization::Special-purpose and application-based systems, DRNTU::Engineering::Computer science and engineering::Hardware::Input/output and data communications
Popis souboru: 42 p.; application/pdf
Relation: https://hdl.handle.net/10356/61961
Dostupnost: https://hdl.handle.net/10356/61961
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Témata: DRNTU::Engineering::Computer science and engineering::Computing methodologies::Symbolic and algebraic manipulation, DRNTU::Engineering::Electrical and electronic engineering::Molecular electronics, DRNTU::Engineering::Electrical and electronic engineering::Semiconductors, DRNTU::Engineering::Computer science and engineering::Hardware::Arithmetic and logic structures, DRNTU::Engineering::Computer science and engineering::Hardware::Logic design, DRNTU::Engineering::Computer science and engineering::Theory of computation::Logics and meanings of programs, DRNTU::Engineering::Computer science and engineering::Theory of computation::Mathematical logic and formal languages, DRNTU::Engineering::Computer science and engineering::Hardware::Integrated circuits, edu, info
Relation: http://hdl.handle.net/10356/55074
Dostupnost: http://hdl.handle.net/10356/55074
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Témata: DRNTU::Engineering::Computer science and engineering::Computer systems organization::Performance of systems, DRNTU::Engineering::Computer science and engineering::Hardware::Logic design
Popis souboru: 155 p.; application/pdf
Relation: https://hdl.handle.net/10356/42513
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Popis souboru: 138 p.; application/pdf
Relation: Oliver, T. F. (2009). Wire level encapsulation framework for increasing FPGA design productivity. Doctoral thesis, Nanyang Technological University, Singapore.; https://hdl.handle.net/10356/19266
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Popis souboru: application/pdf
Relation: https://hdl.handle.net/10356/2335
Dostupnost: https://hdl.handle.net/10356/2335
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Popis souboru: application/pdf
Relation: https://hdl.handle.net/10356/2610
Dostupnost: https://hdl.handle.net/10356/2610
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