Search Results - "DRNTU::Engineering::Computer science and engineering::Hardware::Arithmetic and logic structures"

Optimization of structural adders in fixed coefficient transposed direct form FIR filters

Authors: Faust, Mathias Chang, Chip Hong School of Electrical and Electronic Engineering et al.

Contributors: Faust, Mathias Chang, Chip Hong School of Electrical and Electronic Engineering et al.

Subject Terms: DRNTU::Engineering::Computer science and engineering::Hardware::Arithmetic and logic structures, DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits, DRNTU::Engineering::Electrical and electronic engineering::Electronic systems::Signal processing

File Description: 4 p.; application/pdf

Relation: Faust, M. (2009). Optimization of structural adders in fixed coefficient transposed direct form FIR filters. In Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS) 2009: Centre for High Performance Embedded Systems, Nanyang Technological University, Singapore.; https://hdl.handle.net/10356/80021; https://hdl.handle.net/10220/4666

Availability: https://hdl.handle.net/10356/80021
https://hdl.handle.net/10220/4666

Computer architecture, networking and parallel processing

Authors: Gupta, Anil Kumar Tan, Eng Chong Hsu, Wen Jing et al.

Contributors: Gupta, Anil Kumar Tan, Eng Chong Hsu, Wen Jing et al.

Subject Terms: DRNTU::Engineering::Computer science and engineering::Hardware::Arithmetic and logic structures, DRNTU::Engineering::Computer science and engineering::Computer systems organization::Computer-communication networks, DRNTU::Engineering::Computer science and engineering::Computer systems organization::Processor architectures

File Description: application/pdf

Relation: https://hdl.handle.net/10356/2316

Availability: https://hdl.handle.net/10356/2316

Computer architecture, digital systems and parallel processing

Authors: Anil Gupta Tan, Eng Chong Hui, Siu Cheung et al.

Contributors: Anil Gupta Tan, Eng Chong Hui, Siu Cheung et al.

Subject Terms: DRNTU::Engineering::Computer science and engineering::Computer systems organization, DRNTU::Engineering::Computer science and engineering::Hardware::Arithmetic and logic structures, DRNTU::Engineering::Computer science and engineering::Computer systems organization::Processor architectures

File Description: application/pdf

Relation: https://hdl.handle.net/10356/2318

Availability: https://hdl.handle.net/10356/2318

Hardware efficient algorithms and architectures for burst communications in cognitive radios

Authors: Syed Naveen Altaf Ahmed A. S. Madhukumar School of Computer Science and Engineering et al.

Contributors: Syed Naveen Altaf Ahmed A. S. Madhukumar School of Computer Science and Engineering et al.

Subject Terms: DRNTU::Engineering::Electrical and electronic engineering::Wireless communication systems, DRNTU::Engineering::Electrical and electronic engineering::Electronic systems::Signal processing, DRNTU::Engineering::Computer science and engineering::Hardware::Arithmetic and logic structures, DRNTU::Engineering::Computer science and engineering::Hardware::Logic design

File Description: 172 p.; application/pdf

Relation: Syed Naveen Altaf Ahmed. (2018). Hardware efficient algorithms and architectures for burst communications in cognitive radios. Doctoral thesis, Nanyang Technological University, Singapore.; https://hdl.handle.net/10356/74185

Availability: https://hdl.handle.net/10356/74185
https://doi.org/10.32657/10356/74185

Design methodologies for complexity reduction of FIR filters

Authors: Faust, Mathias Chang Chip Hong School of Electrical and Electronic Engineering et al.

Contributors: Faust, Mathias Chang Chip Hong School of Electrical and Electronic Engineering et al.

Subject Terms: DRNTU::Engineering::Electrical and electronic engineering::Electronic systems::Signal processing, DRNTU::Engineering::Computer science and engineering::Hardware::Arithmetic and logic structures, DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits

File Description: 207 p.; application/pdf

Relation: Faust, M. (2014). Design methodologies for complexity reduction of FIR filters. Doctoral thesis, Nanyang Technological University, Singapore.; https://hdl.handle.net/10356/61746

Availability: https://hdl.handle.net/10356/61746
https://doi.org/10.32657/10356/61746

Intelligent high level synthesis for customization on reconfigurable platforms

Authors: Sharad Sinha Thambipillai Srikanthan School of Computer Engineering et al.

Contributors: Sharad Sinha Thambipillai Srikanthan School of Computer Engineering et al.

Subject Terms: DRNTU::Engineering::Computer science and engineering::Hardware::Arithmetic and logic structures, DRNTU::Engineering::Computer science and engineering::Hardware::Register-transfer-level implementation

File Description: 179 p.; application/pdf

Relation: Sharad Sinha. (2014). Intelligent high level synthesis for customization on reconfigurable platforms. Doctoral thesis, Nanyang Technological University, Singapore.; https://hdl.handle.net/10356/61691

Availability: https://hdl.handle.net/10356/61691
https://doi.org/10.32657/10356/61691

DNA mediated transistors based on multi-valued logic

Authors: Arjun Kudva. Shu Jian Jun School of Mechanical and Aerospace Engineering

Contributors: Arjun Kudva. Shu Jian Jun School of Mechanical and Aerospace Engineering

Subject Terms: DRNTU::Engineering::Computer science and engineering::Computing methodologies::Symbolic and algebraic manipulation, DRNTU::Engineering::Electrical and electronic engineering::Molecular electronics, DRNTU::Engineering::Electrical and electronic engineering::Semiconductors, DRNTU::Engineering::Computer science and engineering::Hardware::Arithmetic and logic structures, DRNTU::Engineering::Computer science and engineering::Hardware::Logic design, DRNTU::Engineering::Computer science and engineering::Theory of computation::Logics and meanings of programs, DRNTU::Engineering::Computer science and engineering::Theory of computation::Mathematical logic and formal languages, DRNTU::Engineering::Computer science and engineering::Hardware::Integrated circuits, edu, info

Relation: http://hdl.handle.net/10356/55074

Availability: http://hdl.handle.net/10356/55074

Detection of road markings for advanced driver assistance

Authors: Suchitra Sathyanarayana Thambipillai Srikanthan School of Computer Engineering et al.

Contributors: Suchitra Sathyanarayana Thambipillai Srikanthan School of Computer Engineering et al.

Subject Terms: DRNTU::Engineering::Computer science and engineering::Computing methodologies::Image processing and computer vision, DRNTU::Engineering::Computer science and engineering::Hardware::Arithmetic and logic structures, DRNTU::Engineering::Computer science and engineering::Computer systems organization::Special-purpose and application-based systems, info, socio

Relation: https://hdl.handle.net/10356/54995

Availability: https://hdl.handle.net/10356/54995

Detection of road markings for advanced driver assistance

Authors: Suchitra Sathyanarayana Thambipillai Srikanthan School of Computer Engineering et al.

Contributors: Suchitra Sathyanarayana Thambipillai Srikanthan School of Computer Engineering et al.

Subject Terms: DRNTU::Engineering::Computer science and engineering::Computing methodologies::Image processing and computer vision, DRNTU::Engineering::Computer science and engineering::Hardware::Arithmetic and logic structures, DRNTU::Engineering::Computer science and engineering::Computer systems organization::Special-purpose and application-based systems

File Description: 239 p.; application/pdf

Relation: Suchitra Sathyanarayana. (2013). Detection of road markings for advanced driver assistance. Doctoral thesis, Nanyang Technological University, Singapore.; https://hdl.handle.net/10356/54995

Availability: https://hdl.handle.net/10356/54995
https://doi.org/10.32657/10356/54995

Efficient polynomial evaluation algorithm and implementation on FPGA

Authors: Xu, Simin Ian Vince McLoughlin School of Computer Engineering et al.

Contributors: Xu, Simin Ian Vince McLoughlin School of Computer Engineering et al.

Subject Terms: DRNTU::Engineering::Computer science and engineering::Hardware::Arithmetic and logic structures

File Description: 98 p.; application/pdf

Relation: Xu, S. (2013). Efficient polynomial evaluation algorithm and implementation on FPGA. Master’s thesis, Nanyang Technological University, Singapore.; https://hdl.handle.net/10356/54869

Availability: https://hdl.handle.net/10356/54869
https://doi.org/10.32657/10356/54869

DNA mediated transistors based on multi-valued logic

Authors: Arjun Kudva. Shu Jian Jun School of Mechanical and Aerospace Engineering

Contributors: Arjun Kudva. Shu Jian Jun School of Mechanical and Aerospace Engineering

Subject Terms: DRNTU::Engineering::Computer science and engineering::Computing methodologies::Symbolic and algebraic manipulation, DRNTU::Engineering::Electrical and electronic engineering::Molecular electronics, DRNTU::Engineering::Electrical and electronic engineering::Semiconductors, DRNTU::Engineering::Computer science and engineering::Hardware::Arithmetic and logic structures, DRNTU::Engineering::Computer science and engineering::Hardware::Logic design, DRNTU::Engineering::Computer science and engineering::Theory of computation::Logics and meanings of programs, DRNTU::Engineering::Computer science and engineering::Theory of computation::Mathematical logic and formal languages, DRNTU::Engineering::Computer science and engineering::Hardware::Integrated circuits

File Description: 97 p.; application/pdf

Relation: https://hdl.handle.net/10356/55074

Availability: https://hdl.handle.net/10356/55074

Number theory based signal conversion and processing techniques

Authors: Vun, Chan Hua. Annamalai Benjamin Premkumar School of Computer Engineering

Contributors: Vun, Chan Hua. Annamalai Benjamin Premkumar School of Computer Engineering

Subject Terms: DRNTU::Engineering::Computer science and engineering::Computer applications::Computers in other systems, DRNTU::Engineering::Computer science and engineering::Mathematics of computing, DRNTU::Engineering::Computer science and engineering::Hardware::Arithmetic and logic structures

File Description: 232 p.; application/pdf

Relation: https://hdl.handle.net/10356/50601

Availability: https://hdl.handle.net/10356/50601

High performance multiply-accumulate unit for residue number system DSP core

Authors: Pretthy, A. P. Radhakrishnan, Damu School of Computer Engineering

Contributors: Pretthy, A. P. Radhakrishnan, Damu School of Computer Engineering

Subject Terms: DRNTU::Engineering::Computer science and engineering::Hardware::Arithmetic and logic structures

File Description: application/pdf

Relation: https://hdl.handle.net/10356/2622

Availability: https://hdl.handle.net/10356/2622