Search Results - "Concurrent Programming— parallel programming General Terms Design"

FlexBulk: Intelligently Forming Atomic Blocks in Blocked-Execution Multiprocessors to Minimize Squashes

Authors: Rishi Agarwal Josep Torrellas The Pennsylvania State University CiteSeerX Archives

Contributors: Rishi Agarwal Josep Torrellas The Pennsylvania State University CiteSeerX Archives

Source: http://iacoma.cs.uiuc.edu/iacoma-papers/isca11_1.pdf.

Subject Terms: Categories and Subject Descriptors C.1.2 [Processor Architectures, Multiple Data Stream Architectures- MIMD Processors, D.1.3 [Programming Techniques, Concurrent Programming- Parallel Programming. General Terms Design, Performance. Keywords Atomic Block Execution, Thread Squash, Speculation

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Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.307.5609

Availability: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.307.5609
http://iacoma.cs.uiuc.edu/iacoma-papers/isca11_1.pdf

Software transactional memory for multicore embedded systems

Authors: Jennifer Mankin David Kaeli John Ardini et al.

Contributors: Jennifer Mankin David Kaeli John Ardini et al.

Source: http://www3.ece.neu.edu/~jmankin/docs/jmankin-lctes09.pdf.

Subject Terms: Categories and Subject Descriptors D.1.3 [Programming Tech- niques, Concurrent Programming—parallel programming General Terms Design, Experimentation, Performance Keywords Embedded Systems, Multicore, Software Transac- tional Memory (STM, Synchronization, Locking, Transactions

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Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.539.4737

Availability: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.539.4737
http://www3.ece.neu.edu/~jmankin/docs/jmankin-lctes09.pdf

Adaptive transaction scheduling for transactional memory systems

Authors: Richard M. Yoo Hsien-hsin S. Lee The Pennsylvania State University CiteSeerX Archives

Contributors: Richard M. Yoo Hsien-hsin S. Lee The Pennsylvania State University CiteSeerX Archives

Source: http://arch.ece.gatech.edu/pub/spaa08-2.pdf.

Subject Terms: Categories and Subject Descriptors D.1.3 [Programming Techniques, Concurrent Programming— parallel programming General Terms Design, Performance Keywords Contention Intensity, Parallelism, Performance, Transaction Effec- tiveness, Transactional Memory Systems

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Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.537.3323

Availability: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.537.3323
http://arch.ece.gatech.edu/pub/spaa08-2.pdf

HaLock: Hardware-Assisted Lock Contention Detection in Multithreaded Applications

Authors: Yongbing Huang Zehan Cui Licheng Chen et al.

Contributors: Yongbing Huang Zehan Cui Licheng Chen et al.

Source: http://asg.ict.ac.cn/baoyg/downloads/PACT12-HaLock.pdf.

Subject Terms: Concurrent Programming--Parallel programming General Terms Design, Measurement, Performance

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Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.362.1188

Availability: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.362.1188
http://asg.ict.ac.cn/baoyg/downloads/PACT12-HaLock.pdf

Bridging Parallel and Reconfigurable Computing with Multilevel PGAS and SHMEM+

Authors: V. Aggarwal A. George K. Yalamanchili et al.

Contributors: V. Aggarwal A. George K. Yalamanchili et al.

Source: http://www.gidel.com/pdf/SHMEM_aggarwal.pdf.

Subject Terms: D.1.3 [Programming Techniques, Concurrent Programming – parallel programming. General Terms Design, Languages, Performance Keywords Reconfigurable computing, parallel programming, programming language, programming model, productivity, portability

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Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.211.4084; http://www.gidel.com/pdf/SHMEM_aggarwal.pdf

Availability: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.211.4084
http://www.gidel.com/pdf/SHMEM_aggarwal.pdf

Litmus Tests for Comparing Memory Consistency Models: How Long Do They Need to Be?

Authors: Mador-Haim, Sela Alur, Rajeev Martin, Milo M. K.

Source: DAC: Annual ACM/IEEE Design Automation Conference; Jun2011, p504-509, 6p, 3 Diagrams, 1 Chart

Subject Terms: PARALLEL programming, MEMORY maps (Computer science), COMPUTER software execution, POWERPC microprocessors, COMPUTER multitasking

MAPS: An Integrated Framework for MPSoC Application Parallelization.

Authors: Ceng, J. Castrillon, J. Sheng, W. et al.

Source: DAC: Annual ACM/IEEE Design Automation Conference; 2008, p754-759, 6p, 1 Color Photograph, 4 Diagrams, 1 Chart

Subject Terms: PROGRAMMING languages, COMPUTER software, SOFTWARE architecture, COMPUTER programming, COMPUTER science research

Iterational Retiming with Partitioning: Loop Scheduling with Complete Memory Latency Hiding.

Authors: XUE, CHUN JASON JINGTONG HU ZILI SHAO et al.

Source: ACM Transactions on Embedded Computing Systems; Feb2010, Vol. 9 Issue 3, p22-22:26, 26p, 16 Diagrams, 5 Charts, 2 Graphs

Subject Terms: MICROPROCESSORS, COMPUTER systems, COMPUTER storage devices, SCHEDULING, MATHEMATICAL optimization

Mostly Static Program Partitioning of Binary Executables.

Authors: YARDIMCI, EFE FRANZ, MICHAEL

Source: ACM Transactions on Programming Languages & Systems; Jun2009, Vol. 31 Issue 5, p17:1-17:46, 46p, 10 Diagrams, 6 Charts, 8 Graphs

Subject Terms: PARALLEL processing, COMPUTERS, ELECTRONIC systems, MULTIPROCESSORS, MULTIPROGRAMMING (Electronic computers), COMPUTER software, CELLULAR automata