Search Results - "COMPUTER architecture"

Accelerating many-core, heterogeneous, and distributed architectures with hardware runtimes and programming models

Authors: De Haro Ruiz, Juan Miguel

Contributors: University/Department: Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors

Thesis Advisors: Álvarez Martínez, Carlos, Jiménez González, Daniel

Source: TDX (Tesis Doctorals en Xarxa)

Subject Terms: High Performance Computing (HPC), Field-Programmable Gate Array (PFGA), task scheduling, task-based programming models, computer architecture, CPU, MPI, High-Level Synthesis (HLS), energy efficiency, programmability, many-core architectures, FPGA clusters, hardware runtimes, hardware acceleration, ASIC, Implicit Message Passing (IMP), Àrees temàtiques de la UPC::Informàtica, 004 - Informàtica

File Description: application/pdf

Access URL: http://hdl.handle.net/10803/695347
https://dx.doi.org/10.5821/dissertation-2117-442722

Efficient data movement in large-scale heterogeneous systems

Authors: López Paradís, Guillem

Contributors: University/Department: Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors

Thesis Advisors: Moretó Planas, Miquel, Armejach Sanosa, Adrià

Source: TDX (Tesis Doctorals en Xarxa)

Subject Terms: Heterogeneous computing, Computer architecture, RISC-V, Accelerators, Manycore, RTL simulation, Hardware–software co-design, Machine learning (ML), Data movement, High-performance computing (HPC), gem5, RTL, System-On-Chip (SoC), Simulation, Verilator, GHDL, Networ-On-Chip, MPSoC, Memory Coherence, Memory Hierarchy, FPGA, HLS, Àrees temàtiques de la UPC::Informàtica, 004 - Informàtica

File Description: application/pdf

Access URL: http://hdl.handle.net/10803/695101
https://dx.doi.org/10.5821/dissertation-2117-440468

Model-based definition-assisted asset administration shell as enabler for smart production line.

Authors: Lu, Quanbo Li, Mei Zhu, Dong

Source: International Journal of Computer Integrated Manufacturing. Nov2025, Vol. 38 Issue 11, p1560-1576. 17p.

Subject Terms: *INDUSTRY 4.0, *STANDARDIZATION, *AUTOMATION, PLUG & play (Computer architecture), MODEL-driven software architecture, DIGITAL twin

Hybrid Space and Submarine Architecture to Ensure Information Security of Telecommunications (HEIST)

Authors: Boschetti, Nicolo Koyyada, Anurag Downs, Barrett et al.

Source: IEEE Access. 13:193765-193785

Subject Terms: Communication Networks, Non Terrestrial Networks, Satellite Communications, Situational Awareness, Systems Engineering, Undersea Cables, Architecture, Computer architecture, Network architecture, Network security, Secure communication, Submarine cables, Submarines, Communications networks, Cyber threats, Global connectivity, Non terrestrial network, Submarine-cables, Terrestrial networks, Undersea cable, Undersea communications, Satellite communication systems

File Description: electronic

Access URL: https://urn.kb.se/resolve?urn=urn:nbn:se:bth-28944
https://doi.org/10.1109/ACCESS.2025.3631359

Steerable Subarrays for Practical mmWave Massive MIMO: Algorithm Design and System-Level Analysis

Authors: Kanters, Noud B. Alayón Glazunov, Andrés

Source: IEEE OPEN JOURNAL OF VEHICULAR TECHNOLOGY. 6:2224-2235

Subject Terms: Array signal processing, Antenna arrays, Computer architecture, Channel estimation, Millimeter wave communication, Signal to noise ratio, Vectors, Radio frequency, Phase shifters, Spectral efficiency, multi-user MIMO, partially-connected hybrid beamforming

File Description: electronic

Access URL: https://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-217544
https://doi.org/10.1109/OJVT.2025.3597730

MangoLeafXNet: An Explainable Deep Learning Model for Accurate Mango Leaf Disease Classification

Authors: Rayed, Md. Eshmam Jim, Jamin Rahman Islam, Md Juniadul et al.

Source: IEEE Access. 13:93977-94008

Subject Terms: Accuracy, Plant diseases, Computational modeling, Deep learning, Computer architecture, Crops, Mathematical models, Robustness, Real-time systems, Image classification, Image processing, convolutional neural network, mango leaf disease, explainable AI

File Description: print

Access URL: https://urn.kb.se/resolve?urn=urn:nbn:se:mdh:diva-72165
https://doi.org/10.1109/ACCESS.2025.3571450

Beyond Diagonal RIS-Aided Networks: Performance Analysis and Sectorization Tradeoff

Authors: Samy, Mostafa Al-Hraishawi, Hayder Adam, Abuzar B. M. et al.

Source: IEEE Open Journal of the Communications Society. 6:302-315

Subject Terms: Reconfigurable intelligent surfaces, Computer architecture, Wireless communication, Energy efficiency, Probability density function, Signal to noise ratio, Probability, Communication systems, Power system reliability, Performance analysis, Beyond diagonal reconfigurable intelligent surface (BD-RIS), full-space coverage, multisector RIS, performance analysis, time switching mode

File Description: print

Access URL: https://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-364734
https://doi.org/10.1109/OJCOMS.2024.3514696

Mobility Aware Spectrum Handoff in 6G-Enabled Cognitive Radio Vehicular Centralized and Ad-Hoc Networks

Authors: Hoque, Shanidul Sahu, Hemanta Kumar Hasan, Mohammed Nazibul et al.

Source: IEEE Access. 13:22800-22811

Subject Terms: Cognitive radio, Copper, Measurement, Analytical models, Switches, Microprocessors, Maintenance, Hidden Markov models, Computer architecture, 6G mobile communication, Vehicular cognitive radio cellular networks, mobility of cognitive users, service time distribution models, performance analysis, spectrum handoff models

File Description: electronic

Access URL: https://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-551465
https://doi.org/10.1109/ACCESS.2025.3537096

Improving memory access efficiency for real-time rendering in tile-based GPU architectures

Authors: Joseph, Diya

Contributors: University/Department: Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors

Thesis Advisors: González Colás, Antonio María, Aragón Alcaraz, Juan Luis

Source: TDX (Tesis Doctorals en Xarxa)

Subject Terms: Computer Architecture, Hardware, Microarchitecture, GPU, Graphics Processing Unit, Computer Graphics, Games, Video Games, Android, Google Play Store, Graphics Workloads, Tile-Based Rendering, TBR, Real-Time Rendering, Energy-Efficiency, Battery, Mobile-Devices, Memory Locality, Memory Hierarchy, Cache Replacement Policy, Cache Bypassing, Warp Schedulers, Texture Locality, Load Balancing, Frameto-Frame Coherence, Belady’s MIN, Mattson’s OPT, Memory Latency, Prefetching, Memory Parallelism, Optimal, Heuristic, Formal Proof, Inter-Frame Locality, Boustrophedon, Tiling, Parameter Buffer, Reorder, Circular Trace, Àrees temàtiques de la UPC::Informàtica, 004 - Informàtica

File Description: application/pdf

Access URL: http://hdl.handle.net/10803/695138
https://dx.doi.org/10.5821/dissertation-2117-440649

Auch für kleinere Messgeräte-Hersteller.

Source: Elektronik Industrie. 10/8/2025, Issue 10, p44-46. 3p.

Subject Terms: *MANUFACTURING industries, *NEW product development, *COST, USB technology, PLUG & play (Computer architecture), TESTING equipment, ELECTRIC connectors

A digital twin approach for online reconfiguration of robotic manufacturing systems toward plug-and-produce.

Authors: Peng, Ling Yang, Zhijian Ye, Xun et al.

Source: International Journal of Computer Integrated Manufacturing. Aug2025, p1-27. 27p. 21 Illustrations.

Subject Terms: *COMPUTER network protocols, *MATHEMATICAL optimization, *MODULAR design, *INDUSTRIAL robots, DIGITAL twin, PLUG & play (Computer architecture)

An Efficient Sorting Algorithm and Its Hardware Architecture for General Applications.

Authors: Nguyen-Ly, Thien-Truong Nguyen, Kim-Anh

Source: Circuits, Systems & Signal Processing. Nov2025, Vol. 44 Issue 11, p8422-8438. 17p.

Subject Terms: *SORTING (Electronic computers), *COMPUTER architecture, *DATA structures, *COMPUTER performance, *SCALABILITY, *FIELD programmable gate arrays

ViT-Reg: Regression-Focused Hardware-Aware Fine-Tuning for ViT on TinyML Platforms

Authors: Md Ragib Shaharear Arnab Neelim Mazumder Tinoosh Mohsenin

Source: IEEE Design & Test. 42:35-44

Subject Terms: real-time and energy efficient deployment, Polynomials, Regression, tinyML Hardware, Hardware, Transformers, Tiny machine learning, Power demand, Training, Computer vision, Computer architecture, Head, Accuracy, Vision Transformer

Speeding up L-BFGS by direct approximation of the inverse Hessian matrix: Speeding up L-BFGS by direct approximation...: A. Sadeghi-Lotfabadi, K. Ghiasi-Shirazi.

Authors: Sadeghi-Lotfabadi, Ashkan Ghiasi-Shirazi, Kamaledin

Source: Computational Optimization & Applications. May2025, Vol. 91 Issue 1, p283-310. 28p.

Subject Terms: SIMD (Computer architecture), COMPUTATIONAL mathematics, QUASI-Newton methods, MATRIX inversion, LINEAR operators

Specifying and Verifying Programs Over the MCA ARMv8 Architecture with TLA+.

Authors: Xiao, Lili Hou, Zhiru Zhu, Huibiao et al.

Source: Journal of Circuits, Systems & Computers. 1/15/2026, Vol. 35 Issue 1, p1-21. 21p.

Subject Terms: *SOFTWARE verification, *COMPUTER architecture, *SYNCHRONIZATION, *FORMAL methods (Computer science), *FORMAL languages, *PARALLEL programs (Computer programs), *PARALLEL processing

Prospects for memristors with hysteretic memristance as so-far missing core hardware element for transfer-less data computing and storage.

Authors: Schmidt, Heidemarie^1,2,3 (AUTHOR) Heidemarie.Schmidt@uni-jena.de

Source: Journal of Applied Physics. 5/28/2024, Vol. 135 Issue 20, p1-8. 8p.

Subject Terms: *ARTIFICIAL intelligence, *COMPUTER architecture, *CRYPTOCURRENCY mining, *DATA warehousing, *MEMRISTORS, *CRYPTOCURRENCIES

Barnes Reports: ELECTRONIC COMPUTER MANUFACTURING INDUSTRY (NAICS 334111).

Source: Worldwide Electronic Computer Manufacturing Industry Report. 2025, p1-202. 202p.

Subject Terms: *COMPUTERS, *MAINFRAME computers, *PERSONAL computers, HYBRID computers (Computer architecture), ANALOG computers

SpiRec: Soft-Logic Architecture Exploration of Reconfigurable Systems for Spiking Neural Networks: Soft-Logic Architecture Exploration of Reconfigurable Systems for Spiking Neural Networks

Authors: Lai, Xunqin Corradi, Federico Sahoo, Siva Satyendra

Source: 2025 IEEE 36th International Conference on Application-specific Systems, Architectures and Processors (ASAP). :109-116

Subject Terms: Artificial intelligence, Spiking neural networks, Logic, Field Programmable Gate Arrays, Resource management, Field programmable gate arrays, Logic gates, AI Computing, Spiking Neural Networks, Reconfigurable Architectures, Computer architecture, Delays, Systems architecture, Routing

LEVERAGING MACHINE LEARNING FOR RAINFALL PREDICTION IN NORTH-CENTRAL NIGERIA: COMPARATIVE ALGORITHM STUDY.

Authors: Balogun, G. B. Kudabo, D. T. Peter, O. J. et al.

Source: Journal of Science & Technology (1607-2073). 2025, Vol. 30 Issue 4, p51-67. 17p.

Subject Terms: *NUMERICAL weather forecasting, *COMPUTER architecture, *DEW point, *DEEP learning, *COMPUTER simulation

Hardware‐Efficient Quantized Stochastic Computing With Reduced Precision Stochastic Number Generator and LFSR‐Based Counter.

Authors: Lee, Donghui Kim, Yongtae

Source: International Journal of Circuit Theory & Applications. Jul2025, p1. 14p. 14 Illustrations.

Subject Terms: *RANDOM number generators, *COMPUTER architecture, *STOCHASTIC approximation, *ELECTRIC power conservation, *BINARY sequences, *MECHANICAL efficiency