Výsledky vyhľadávania - "B.8.2 Performance Analysis and Design Aids General Terms Algorithms"

39.3 A Framework for Block-Based Timing Sensitivity Analysis

Autori: Sanjay V. Kumar Chandramouli V. Kashyap Sachin S. Sapatnekar a ďalší

Prispievatelia: Sanjay V. Kumar Chandramouli V. Kashyap Sachin S. Sapatnekar a ďalší

Zdroj: http://www.ee.umn.edu/users/sachin/conf/dac08sk.pdf.

Predmety: B.8.2 Performance Analysis and Design Aids General Terms Algorithms, Performance, Design Keywords Variations, Arrival times, Slacks, Pruning, Reordering

Popis súboru: application/pdf

Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.152.3506; http://www.ee.umn.edu/users/sachin/conf/dac08sk.pdf

Dostupnosť: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.152.3506
http://www.ee.umn.edu/users/sachin/conf/dac08sk.pdf

A Framework for Block-Based Timing Sensitivity Analysis.

Autori: Kumar, Sanjay V. Kashyap, Chandramouli V. Sapatnekar, Sachin S.

Zdroj: DAC: Annual ACM/IEEE Design Automation Conference; 2008, p688-693, 6p, 5 Diagrams, 7 Charts, 5 Graphs

Predmety: MICROPROCESSORS, HIGH performance computing research, CYBERNETICS, COMPUTER systems, DISTRIBUTION (Probability theory)

Application-driven Floorplan-Aware Voltage Island Design.

Autori: Sengupta, Dipanjan Saleh, Resve

Zdroj: DAC: Annual ACM/IEEE Design Automation Conference; 2008, p155-160, 6p, 5 Diagrams, 4 Charts, 3 Graphs

Predmety: MATHEMATICAL optimization, INTEGRATED circuits, NONLINEAR programming, ELECTRONIC systems, SYSTEMS design

A methodology to improve timing yield in the presence of process variations.

Autori: Raj, S. Vrudhula, S.B.K. Wang, J.

Zdroj: Proceedings 41st Design Automation Conference, 2004; 2004, p448-453, 6p

Designing mega-ASICs in nanogate technologies.

Autori: Lackey, D.E. Zuchowski, P.S. Koehl, J.

Zdroj: Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451); 2003, p770-775, 6p