Výsledky vyhľadávania - "Algorithms implemented in hardware General Terms Algorithms"

Evaluating and optimizing power consumption of anti-collision protocols for applications in RFID systems

Autori: Feng Zhou Chunhong Chen Dawei Jin a ďalší

Prispievatelia: Feng Zhou Chunhong Chen Dawei Jin a ďalší

Zdroj: http://www.cs.york.ac.uk/rts/docs/SIGDA-Compendium-1994-2004/papers/2004/islped04/pdffiles/p357.pdf.

Predmety: Categories and Subject Descriptors B.7.1 [Integrated Circuits, Types and Design Styles – algorithms implemented in hardware. General Terms Algorithms, Design, Performance. Keywords Radio-frequency identification

Popis súboru: application/pdf

Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.387.5208

Dostupnosť: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.387.5208
http://www.cs.york.ac.uk/rts/docs/SIGDA-Compendium-1994-2004/papers/2004/islped04/pdffiles/p357.pdf

11.1 The Design of a Low Power Asynchronous Multiplier

Autori: Yijun Liu Steve Furber The Pennsylvania State University CiteSeerX Archives

Prispievatelia: Yijun Liu Steve Furber The Pennsylvania State University CiteSeerX Archives

Zdroj: http://www.cs.york.ac.uk/rts/docs/SIGDA-Compendium-1994-2004/papers/2004/islped04/pdffiles/p301.pdf.

Predmety: Categories and Subject Descriptors B.2 [Arithmetic and Logic Structures, General, B.6 [Logic Design, Design Styles—Combinational logic, B.7 [Integrated Circuits, Types and Design Styles—Algorithms implemented in hardware General Terms Algorithms, Design Keywords Asynchronous logic, low power, multiplier, Booth’s algorithm

Popis súboru: application/pdf

Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.387.2771

Dostupnosť: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.387.2771
http://www.cs.york.ac.uk/rts/docs/SIGDA-Compendium-1994-2004/papers/2004/islped04/pdffiles/p301.pdf

ABSTRACT TCAM Enabled On-Chip Logic Minimization

Autori: Seraj Ahmad The Pennsylvania State University CiteSeerX Archives

Prispievatelia: Seraj Ahmad The Pennsylvania State University CiteSeerX Archives

Zdroj: http://research.cs.tamu.edu/codesign/Publication-list/DAC 2005.pdf.

Predmety: Categories and Subject Descriptors B.7.1 [Integrated Circuits, Types and Design Styles— Algorithms implemented in hardware General Terms Algorithms, Design Keywords TCAM, Logic Minimization, On-Chip

Popis súboru: application/pdf

Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.90.2636

Dostupnosť: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.90.2636
http://research.cs.tamu.edu/codesign/Publication-list/DAC 2005.pdf

TCAM Enabled On-Chip Logic Minimization

Autori: Seraj Ahmad Rabi Mahapatra The Pennsylvania State University CiteSeerX Archives

Prispievatelia: Seraj Ahmad Rabi Mahapatra The Pennsylvania State University CiteSeerX Archives

Zdroj: http://www.cs.york.ac.uk/rts/docs/DAC-1964-2005/papers/2005/dac05/pdffiles/p678.pdf.

Predmety: Categories and Subject Descriptors B.7.1 [Integrated Circuits, Types and Design Styles— Algorithms implemented in hardware General Terms Algorithms, Design Keywords TCAM, Logic Minimization, On-Chip

Popis súboru: application/pdf

Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.575.3873

Dostupnosť: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.575.3873
http://www.cs.york.ac.uk/rts/docs/DAC-1964-2005/papers/2005/dac05/pdffiles/p678.pdf

FPGA-Accelerated 3D Reconstruction Using Compressive Sensing

Autori: Jianwen Chen Jason Cong Ming Yan a ďalší

Prispievatelia: Jianwen Chen Jason Cong Ming Yan a ďalší

Zdroj: http://ballade.cs.ucla.edu/%7Econg/papers/fpga12.pdf.

Predmety: Categories and Subject Descriptors B.7.1 [Integrated Circuits, Types and Design Styles—Algorithms implemented in hardware General Terms Algorithms, Design, Performance

Popis súboru: application/pdf

Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.228.5206; http://ballade.cs.ucla.edu/%7Econg/papers/fpga12.pdf

Dostupnosť: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.228.5206
http://ballade.cs.ucla.edu/%7Econg/papers/fpga12.pdf

FPGA-Based Front-End Electronics for Positron Emission Tomography

Autori: Michael Haselman Don Dewitt Wendy Mcdougald a ďalší

Prispievatelia: Michael Haselman Don Dewitt Wendy Mcdougald a ďalší

Zdroj: http://www.ee.washington.edu/faculty/hauck/publications/PET_timing_and_localization.pdf.

Predmety: Categories and Subject Descriptors B.7.1 [Integrated Circuits, Types and Design Styles—Gate arrays, Algorithms implemented in hardware General Terms Algorithms, Measurement, Design, Verification Keywords PET, FPGA, Digital Signal Processing, Pulse Timing, Event Localization

Popis súboru: application/pdf

Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.152.2891; http://www.ee.washington.edu/faculty/hauck/publications/PET_timing_and_localization.pdf

Dostupnosť: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.152.2891
http://www.ee.washington.edu/faculty/hauck/publications/PET_timing_and_localization.pdf

Lithographic Aerial Image Simulation with FPGA-Based Hardware Acceleration

Prispievatelia: The Pennsylvania State University CiteSeerX Archives

Zdroj: http://cadlab.cs.ucla.edu/~cong/papers/fpga08-zou.pdf.

Predmety: Categories and Subject Descriptors B.7.1 [Integrated Circuits, Types and Design Styles— Algorithms implemented in hardware General Terms Algorithms, Performance, Design Keywords Lithography simulation, Co-processor acceleration, FPGA

Popis súboru: application/pdf

Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.136.8975

Dostupnosť: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.136.8975
http://cadlab.cs.ucla.edu/~cong/papers/fpga08-zou.pdf

Real-time architecture for HEVC motion compensation sample interpolator for UHD videos.

Autori: Penny, Wagner Paim, Guilherme Porto, Marcelo a ďalší

Zdroj: 2015 28th Symposium on Integrated Circuits & Systems Design (SBCCI); 2015, p1-6, 6p

A sparse matrix vector multiply accelerator for support vector machine.

Autori: Nurvitadhi, Eriko Mishra, Asit Marr, Debbie

Zdroj: 2015 International Conference on Compilers, Architecture & Synthesis for Embedded Systems (CASES); 2015, p109-116, 8p

Evaluating and optimizing power consumption of anti-collision protocols for applications in RFID systems.

Autori: Zhou, Feng Chen, Chunhong Jin, Dawei a ďalší

Zdroj: Proceedings of the 2004 International Symposium Low Power Electronics & Design; 8/9/2004, p357-362, 6p

The design of a low power asynchronous multiplier.

Autori: Liu, Yijun Furber, Steve

Zdroj: Proceedings of the 2004 International Symposium Low Power Electronics & Design; 8/9/2004, p301-306, 6p

Implementing QC-MDPC McEliece Encryption.

Autori: VON MAURICH, INGO ODER, TOBIAS GÜNEYSU, TIM

Zdroj: ACM Transactions on Embedded Computing Systems; Apr2015, Vol. 14 Issue 3, p44:1-44:27, 27p

Predmety: CRYPTOGRAPHY, CODING theory, MICROCONTROLLERS, DATA security, PARITY-check matrix

QUKU: A Dual-Layer Reconfigurable Architecture.

Autori: BERGMANN, NEIL W. SHUKLA, SUNIL K. BECKER, JÜRGEN

Zdroj: ACM Transactions on Embedded Computing Systems; Mar2013, Vol. 12 Issue Supp 1, p63:1-63:26, 26p

Predmety: ADAPTIVE computing systems, COMPUTER architecture, NUMERICAL analysis, ALGORITHMS, IMAGE converters, APPROXIMATION theory