Search Results - "Algorithm-architecture Adequation"

Field programmable gate array implementation of variable‐bins high efficiency video coding CABAC decoder with path delay optimisation.

Authors: Menasri, Wahiba Skoudarli, Abdellah Belhadj, Aichouche et al.

Source: IET Image Processing (Wiley-Blackwell). May2019, Vol. 13 Issue 6, p954-963. 10p.

MODULAR APPROACH FOR AN ASIC INTEGRATION OF ELECTRICAL DRIVE CONTROLS ‫ﭼﮑ‬ ‫ﻴ‬ ‫ﺪﻩ‬

Authors: Kebbati, Youssef Laboratoire de Physique et Chimie de l'Environnement et de l'Espace (LPC2E) Institut national des sciences de l'Univers (INSU - CNRS)-Université d'Orléans (UO)-Centre National de la Recherche Scientifique (CNRS)-Centre National d’Études Spatiales Paris (CNES)

Contributors: Kebbati, Youssef Laboratoire de Physique et Chimie de l'Environnement et de l'Espace (LPC2E) Institut national des sciences de l'Univers (INSU - CNRS)-Université d'Orléans (UO)-Centre National de la Recherche Scientifique (CNRS)-Centre National d’Études Spatiales Paris (CNES)

Source: IJE Transactions ; https://insu.hal.science/insu-01344719 ; IJE Transactions, 2011, 24 (2)

Subject Terms: ASIC, FPGA, Electrical System Control, Modular Design, Algorithm Architecture Adequation, Direct Torque Control, [SDU]Sciences of the Universe [physics]

Availability: https://insu.hal.science/insu-01344719
https://insu.hal.science/insu-01344719v1/document
https://insu.hal.science/insu-01344719v1/file/856201102B01.pdf

A RTL Implementation of Heterogeneous Machine Learning Network for French Computer Assisted Pronunciation Training.

Authors: Bi, Yanjing Li, Chao Benezeth, Yannick et al.

Source: Applied Sciences (2076-3417); May2023, Vol. 13 Issue 10, p5835, 21p

Subject Terms: MACHINE learning, COMPUTER networks, NETWORK PC (Computer), ACOUSTIC signal processing, PRONUNCIATION

FPGAs in Industrial Control Applications.

Authors: Monmasson, Eric Idkhajine, Lahoucine Cirstea, Marcian N. et al.

Source: IEEE Transactions on Industrial Informatics; 05/01/2011, Vol. 7 Issue 2, p224-243, 20p

A scheduling heuristics for distributed real-time embedded systems tolerant to processor and communication media failures.

Authors: Girault *, A. Kalla, H. Sorel, Y.

Source: International Journal of Production Research; 7/15/2004, Vol. 42 Issue 14, p2877-2898, 22p, 1 Chart

Subject Terms: FAULT tolerance (Engineering), EMBEDDED computer systems, FAULT-tolerant computing, ALGORITHMS, PRODUCTION engineering

Fast FPGA prototyping for real-time image processing with very high-level synthesis.

Authors: Li, Chao Bi, Yanjing Marzani, Franck et al.

Source: Journal of Real-Time Image Processing; Oct2019, Vol. 16 Issue 5, p1795-1812, 18p

A Heterogeneous Multi-Core Based Biomedical Application Processing System and Programming Toolkit.

Authors: Hussain, Tassadaq Haider, Amna Taleb-Ahmed, Abdelmalik

Source: Journal of Signal Processing Systems for Signal, Image & Video Technology; Aug2019, Vol. 91 Issue 8, p963-978, 16p

Design and evaluation of a parallel and optimized light-tissue interaction-based method for fast skin lesion assessment.

Authors: Li, Chao Brost, Vincent Benezeth, Yannick et al.

Source: Journal of Real-Time Image Processing; Aug2018, Vol. 15 Issue 2, p407-420, 14p

Automatic Hardware/Software interface generation for SynDEx-mixte.

Authors: Feki, Oussama Grandpierre, Thierry Akil, Mohamed et al.

Source: 2014 1st International Conference on Advanced Technologies for Signal & Image Processing (ATSIP); 2014, p512-516, 5p

SW/HW implementation of image covariance descriptor for person detection systems.

Authors: Abid, Nesrine Ayedi, Walid Abid, Mohamed et al.

Source: 2014 1st International Conference on Advanced Technologies for Signal & Image Processing (ATSIP); 2014, p115-119, 5p

Design and implementation of Direct Torque Control of induction machine on FPGA.

Authors: Gdaim, Soufien Mtibaa, Abdellatif Mimouni, Mohamed Faouzi

Source: 2013 5th International Conference on Modeling, Simulation & Applied Optimization (ICMSAO); 2013, p1-6, 6p

FPGA-based Real-Time Hardware-In-the-Loop validation of a 3-phase PWM rectifier controller.

Authors: Dagbagi, M. Hemdani, A. Idkhajine, L. et al.

Source: IECON 2013 - 39th Annual Conference of the IEEE Industrial Electronics Society; 2013, p5374-5379, 6p

Integration of Optimization Approach Based on Multiple Wordlength Operation Grouping in the AAA Methodology for Real-Time Systems: LVQ Implementation

Authors: Ahmed Ghazi Blaiech Mohamed Boubaker Khaled Ben Khalifa et al.

Source: International Journal of Embedded and Real-Time Communication Systems. 5:37-60

Subject Terms: 0202 electrical engineering, electronic engineering, information engineering, 02 engineering and technology

FPGA implementation of Power Electronic Converter real-time model.

Authors: Dagbagi, M. Idkhajine, L. Monmasson, E. et al.

Source: International Symposium on Power Electronics Power Electronics, Electrical Drives, Automation & Motion; 1/ 1/2012, p658-663, 6p

FPGA-based real-time simulation of sensorless control of PMSM drive at standstill.

Authors: Darba, A. De Belie, F. Vyncke, T. et al.

Source: International Symposium on Power Electronics Power Electronics, Electrical Drives, Automation & Motion; 1/ 1/2012, p1063-1068, 6p

A Parallel Face Detection System Implemented on FPGA.

Authors: Farrugia, N. Mamalet, F. Roux, S. et al.

Source: 2007 IEEE International Symposium on Circuits & Systems; 2007, p3704-3707, 4p

2002 IEEE international conference on systems, man and cybernetics.

Source: IEEE International Conference on Systems, Man & Cybernetics; 2002, pi-liv, 54p

Generation of fault-tolerant static scheduling for real-time distributed embedded systems with multi-point links.

Authors: Girault, A. Lavarenne, C. Sighireanu, M. et al.

Source: Proceedings 15th International Parallel & Distributed Processing Symposium (IPDPS 2001); 2001, p1265-1272, 8p

Software implementation of synchronous programs.

Authors: Andre, C. Boulanger, F. Girault, A.

Source: Proceedings Second International Conference on Application of Concurrency to System Design; 2001, p133-142, 10p

Modeling Resolution of Resources Contention in Synchronous Data Flow Graphs.

Authors: Lattuada, Marco Ferrandi, Fabrizio

Source: Journal of Signal Processing Systems for Signal, Image & Video Technology; Jul2015, Vol. 80 Issue 1, p39-47, 9p