Výsledky vyhledávání - "ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES"

TBES: Template-Based Exploration and Synthesis of Heterogeneous Multiprocessor Architectures on FPGA

Autoři: Corre, Youenn Diguet, Jean-Philippe Heller, Dominique a další

Přispěvatelé: Corre, Youenn Diguet, Jean-Philippe Heller, Dominique a další

Zdroj: ACM Transactions on Embedded Computing Systems. 15:1-27

Témata: [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, 13. Climate action, Electronic System Level, 0202 electrical engineering, electronic engineering, information engineering, ACM: B.: Hardware/B.5: REGISTER-TRANSFER-LEVEL IMPLEMENTATION, Multiprocessor, 02 engineering and technology, High-Level Synthesis, ACM: D.: Software/D.2: SOFTWARE ENGINEERING/D.2.2: Design Tools and Techniques, System-on-Chip

Přístupová URL adresa: https://hal.archives-ouvertes.fr/hal-01172103/document
https://dblp.uni-trier.de/db/journals/tecs/tecs15.html#CorreDHBL16
https://hal.archives-ouvertes.fr/hal-01172103
https://dl.acm.org/doi/10.1145/2816817
https://doi.org/10.1145/2816817

Exploring branch predictability limits with the MTAGE+SC predictor *

Autoři: Seznec, André Pushing Architecture and Compilation for Application Performance (PACAP) Inria Rennes – Bretagne Atlantique a další

Přispěvatelé: Seznec, André Pushing Architecture and Compilation for Application Performance (PACAP) Inria Rennes – Bretagne Atlantique a další

Zdroj: 5th JILP Workshop on Computer Architecture Competitions (JWAC-5): Championship Branch Prediction (CBP-5)
https://inria.hal.science/hal-01354251
5th JILP Workshop on Computer Architecture Competitions (JWAC-5): Championship Branch Prediction (CBP-5), Jun 2016, Seoul, South Korea. pp.4
http://www.jilp.org/cbp2016/

Témata: ACM: C.: Computer Systems Organization, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.1: Single Data Stream Architectures/C.1.1.1: Pipeline processors, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

Geografické téma: Seoul, South Korea

Dostupnost: https://inria.hal.science/hal-01354251
https://inria.hal.science/hal-01354251v1/document
https://inria.hal.science/hal-01354251v1/file/MutiTage-SC.pdf

Hardware and Arithmetic for Hyperelliptic Curves Cryptography

Autoři: Gallin, Gabriel Tisserand, Arnaud Veyrat-Charvillon, Nicolas a další

Přispěvatelé: Gallin, Gabriel Tisserand, Arnaud Veyrat-Charvillon, Nicolas a další

Zdroj: RAIM: 7ème Rencontre Arithmétique de l'Informatique Mathématique ; https://inria.hal.science/hal-01134020 ; RAIM: 7ème Rencontre Arithmétique de l'Informatique Mathématique, Apr 2015, Rennes, France. , 2015 ; http://raim2015.inria.fr/

Témata: Cryptoprocessor, Elliptic Curve Cryptography ECC, Hyper-Elliptic Curve Cryptography HECC, Arithmetic Operator, ACM: B.: Hardware/B.2: ARITHMETIC AND LOGIC STRUCTURES, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, [INFO.INFO-AO]Computer Science [cs]/Computer Arithmetic, [INFO.INFO-CR]Computer Science [cs]/Cryptography and Security [cs.CR], [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics

Geografické téma: Rennes, France

Dostupnost: https://inria.hal.science/hal-01134020
https://inria.hal.science/hal-01134020v1/document
https://inria.hal.science/hal-01134020v1/file/poster.pdf

Yet Another Compressed Cache: a Low Cost Yet Effective Compressed Cache

Autoři: Sardashti, Somayeh Seznec, André Wood, David A. a další

Přispěvatelé: Sardashti, Somayeh Seznec, André Wood, David A. a další

Zdroj: ISSN: 1544-3566.

Témata: ACM: C.: Computer Systems Organization, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES/C.1.2: Multiple Data Stream Architectures (Multiprocessors), [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

Relation: info:eu-repo/grantAgreement//267175/EU/Defying Amdahl\'s Law/DAL

Dostupnost: https://inria.hal.science/hal-01354248
https://inria.hal.science/hal-01354248v1/document
https://inria.hal.science/hal-01354248v1/file/yacc-taco-july%2022-final.pdf
https://doi.org/10.1145/2976740

TAGE-SC-L Branch Predictors

Autoři: Seznec, André Amdahl's Law is Forever (ALF) Inria Rennes – Bretagne Atlantique a další

Přispěvatelé: Seznec, André Amdahl's Law is Forever (ALF) Inria Rennes – Bretagne Atlantique a další

Zdroj: Proceedings of the 4th Championship Branch Prediction ; JILP - Championship Branch Prediction ; https://inria.hal.science/hal-01086920 ; JILP - Championship Branch Prediction, Jun 2014, Minneapolis, United States ; http://www.jilp.org/cbp2014/

Témata: ACM: C.: Computer Systems Organization, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

Geografické téma: Minneapolis, United States

Relation: info:eu-repo/grantAgreement//267175/EU/Defying Amdahl\'s Law/DAL

Dostupnost: https://inria.hal.science/hal-01086920
https://inria.hal.science/hal-01086920/document
https://inria.hal.science/hal-01086920/file/CBP4-TAGE-SC-L.pdf

Skewed Compressed Cache

Autoři: Sardashti, Somayeh Seznec, André Wood, David A. a další

Přispěvatelé: Sardashti, Somayeh Seznec, André Wood, David A. a další

Zdroj: Proceeding of the 47th Annual IEEE/ACM International Symposium on Microarchitecture ; MICRO - 47th Annual IEEE/ACM International Symposium on Microarchitecture ; https://inria.hal.science/hal-01088050 ; MICRO - 47th Annual IEEE/ACM International Symposium on Microarchitecture, Dec 2014, Cambridge, United Kingdom

Témata: component, cache design, compression, performance, energy, ACM: C.: Computer Systems Organization, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

Geografické téma: Cambridge, United Kingdom

Relation: info:eu-repo/grantAgreement//267175/EU/Defying Amdahl\'s Law/DAL

Dostupnost: https://inria.hal.science/hal-01088050
https://inria.hal.science/hal-01088050/document
https://inria.hal.science/hal-01088050/file/scc%20october%202%20%281%29.pdf

Towards Verified Faithful Simulation

Autoři: Joloboff, Vania Monin, Jean-François Shi, Xiaomu a další

Přispěvatelé: Joloboff, Vania Monin, Jean-François Shi, Xiaomu a další

Zdroj: Lecture Notes in Computer Science ISBN: 9783319259413

Témata: 2. Zero hunger, Instruction Set Simulation, [INFO.INFO-LO] Computer Science [cs]/Logic in Computer Science [cs.LO], ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, [INFO.INFO-LO]Computer Science [cs]/Logic in Computer Science [cs.LO], 02 engineering and technology, [INFO] Computer Science [cs], ACM: F.: Theory of Computation/F.3: LOGICS AND MEANINGS OF PROGRAMS/F.3.1: Specifying and Verifying and Reasoning about Programs, [INFO.INFO-MO]Computer Science [cs]/Modeling and Simulation, Computer Architecture, [INFO.INFO-ES] Computer Science [cs]/Embedded Systems, [INFO.INFO-PF]Computer Science [cs]/Performance [cs.PF], ACM: I.: Computing Methodologies/I.6: SIMULATION AND MODELING, Verification & Proofs, [INFO.INFO-PF] Computer Science [cs]/Performance [cs.PF], ACM: F.: Theory of Computation/F.4: MATHEMATICAL LOGIC AND FORMAL LANGUAGES/F.4.2: Grammars and Other Rewriting Systems, 0202 electrical engineering, electronic engineering, information engineering, [INFO.INFO-ES]Computer Science [cs]/Embedded Systems, [INFO.INFO-MO] Computer Science [cs]/Modeling and Simulation, ACM: I.: Computing Methodologies/I.6: SIMULATION AND MODELING/I.6.7: Simulation Support Systems, ACM: I.: Computing Methodologies/I.6: SIMULATION AND MODELING/I.6.7: Simulation Support Systems/I.6.7.0: Environments

Přístupová URL adresa: https://inria.hal.science/hal-01241837v1
https://doi.org/10.1007/978-3-319-25942-0
https://inria.hal.science/hal-01242963v1

Architecture des ordinateurs

Autoři: Lagadec, Loïc Pillement, Sébastien Tisserand, Arnaud a další

Přispěvatelé: Lagadec, Loïc Pillement, Sébastien Tisserand, Arnaud a další

Témata: [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-AR] Computer Science [cs]/Hardware Architecture [cs.AR], ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES

Přístupová URL adresa: https://inria.hal.science/hal-00819668v1

Processeurs : la nouvelle donne par Olivier Temam. Forces et faiblesses de l'Europe : entretien avec Panagiotis Tsarchopoulos, propos recueillis par Dominique Chouchan

Autoři: Temam, Olivier Tsarchopoulos, Panagiotis Architectures, Languages and Compilers to Harness the End of Moore Years (ALCHEMY) a další

Přispěvatelé: Temam, Olivier Tsarchopoulos, Panagiotis Architectures, Languages and Compilers to Harness the End of Moore Years (ALCHEMY) a další

Zdroj: Les Cahiers de l'INRIA - La Recherche ; https://inria.hal.science/inria-00522268 ; Les Cahiers de l'INRIA - La Recherche, 2009, Le hasard au coeur de la vie, 434 octobre 2009

Témata: ACM: C.: Computer Systems Organization/C.3: SPECIAL-PURPOSE AND APPLICATION-BASED SYSTEMS/C.3.2: Real-time and embedded systems, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-ES]Computer Science [cs]/Embedded Systems

Dostupnost: https://inria.hal.science/inria-00522268
https://inria.hal.science/inria-00522268v1/document
https://inria.hal.science/inria-00522268v1/file/inria-n434-oct09.pdf

The Multiplicative Power of Consensus Numbers

Autoři: Imbs, Damien Raynal, Michel As Scalable As Possible: foundations of large scale dynamic distributed systems (ASAP) a další

Přispěvatelé: Imbs, Damien Raynal, Michel As Scalable As Possible: foundations of large scale dynamic distributed systems (ASAP) a další

Zdroj: https://inria.hal.science/inria-00454399 ; [Research Report] PI 1949, 2010, pp.17.

Témata: Asynchronous processes, BG simulation, Consensus number, Distributed computability, Fault-Tolerance, Process crash failure, Reduction algorithm, t-Resilience, k-Set agreement, Shared memory system, Synchronization power, System model, Waitfreedom, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, [INFO.INFO-OS]Computer Science [cs]/Operating Systems [cs.OS]

Relation: Report N°: PI 1949

Dostupnost: https://inria.hal.science/inria-00454399
https://inria.hal.science/inria-00454399v2/document
https://inria.hal.science/inria-00454399v2/file/PI-1949.pdf

Dynamic Variable Stage Pipeline: an Implementation of its Control

Autoři: Boucaron, Julien Coadou, Anthony Models and methods of analysis and optimization for systems with real-time and embedding constraints (AOSTE) a další

Přispěvatelé: Boucaron, Julien Coadou, Anthony Models and methods of analysis and optimization for systems with real-time and embedding constraints (AOSTE) a další

Zdroj: https://inria.hal.science/inria-00381563 ; [Research Report] RR-6918, INRIA. 2009, pp.15.

Témata: Variable length pipeline, Variable stage pipeline, Pipeline stage unification, Low Power, Leakage, Energy, Throughput, ACM: B.: Hardware/B.6: LOGIC DESIGN, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-ES]Computer Science [cs]/Embedded Systems

Dostupnost: https://inria.hal.science/inria-00381563
https://inria.hal.science/inria-00381563v1/document
https://inria.hal.science/inria-00381563v1/file/RR-6918.pdf

Replacement policies for shared caches on symmetric multicores : a programmer-centric point of view

Autoři: Michaud, Pierre Compilation, parallel architectures and system (CAPS) Institut de Recherche en Informatique et Systèmes Aléatoires (IRISA) a další

Přispěvatelé: Michaud, Pierre Compilation, parallel architectures and system (CAPS) Institut de Recherche en Informatique et Systèmes Aléatoires (IRISA) a další

Zdroj: https://inria.hal.science/inria-00340545 ; [Research Report] PI 1908, 2008, pp.25.

Témata: Symmetric multicore processor, quality of service, self-performance, shared cache, replacement policy, memory bandwidth, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

Relation: Report N°: PI 1908

Dostupnost: https://inria.hal.science/inria-00340545
https://inria.hal.science/inria-00340545/document
https://inria.hal.science/inria-00340545/file/PI-1908.pdf

Periodic activity migration for fast sequential execution in future heterogeneous multicore processors

Autoři: Michaud, Pierre Compilation, parallel architectures and system (CAPS) Institut de Recherche en Informatique et Systèmes Aléatoires (IRISA) a další

Přispěvatelé: Michaud, Pierre Compilation, parallel architectures and system (CAPS) Institut de Recherche en Informatique et Systèmes Aléatoires (IRISA) a další

Zdroj: https://inria.hal.science/inria-00340566 ; [Research Report] PI 1909, 2008, pp.20.

Témata: Heterogeneous multicore processor, power consumption, heat flux, periodic activity migration, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

Relation: Report N°: PI 1909

Dostupnost: https://inria.hal.science/inria-00340566
https://inria.hal.science/inria-00340566/document
https://inria.hal.science/inria-00340566/file/PI-1909.pdf

Decoupled Thermal Simulation

Autoři: Guntur, Surendra Michaud, Pierre Compilation, parallel architectures and system (CAPS) a další

Přispěvatelé: Guntur, Surendra Michaud, Pierre Compilation, parallel architectures and system (CAPS) a další

Zdroj: https://inria.hal.science/inria-00192779 ; [Research Report] PI 1871, 2007, pp.31.

Témata: Temperature-constrained processor, performance, energy, simulation, program phase reuse, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-PF]Computer Science [cs]/Performance [cs.PF]

Relation: Report N°: PI 1871

Dostupnost: https://inria.hal.science/inria-00192779
https://inria.hal.science/inria-00192779/document
https://inria.hal.science/inria-00192779/file/PI-1871.pdf

Implementing Wilson-Dirac Operator on the Cell Broadband Engine

Autoři: Ibrahim, Khaled Z. Bodin, François Compilation, parallel architectures and system (CAPS) a další

Přispěvatelé: Ibrahim, Khaled Z. Bodin, François Compilation, parallel architectures and system (CAPS) a další

Zdroj: https://inria.hal.science/inria-00203478 ; [Research Report] PI 1880, 2007, pp.23.

Témata: IBM Cell BE, Vectorization, SIMD, Lattice QCD, Parallel Algorithms, Wilson-Dirac, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

Relation: Report N°: PI 1880

Dostupnost: https://inria.hal.science/inria-00203478
https://inria.hal.science/inria-00203478v1/document
https://inria.hal.science/inria-00203478v1/file/PI-1880.pdf

CASH Design Space Exploration

Autoři: He, Liqiang Dolbeau, Romain Seznec, André a další

Přispěvatelé: He, Liqiang Dolbeau, Romain Seznec, André a další

Zdroj: https://inria.hal.science/inria-00116799 ; [Research Report] PI 1815, 2006, pp.59.

Témata: CASH, design space exploration, performance, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

Relation: Report N°: PI 1815

Dostupnost: https://inria.hal.science/inria-00116799
https://inria.hal.science/inria-00116799/document
https://inria.hal.science/inria-00116799/file/PI-1815.pdf

Scheduling issues on thermally-constrained processors

Autoři: Michaud, Pierre Sazeides, Yiannakis Compilation, parallel architectures and system (CAPS) a další

Přispěvatelé: Michaud, Pierre Sazeides, Yiannakis Compilation, parallel architectures and system (CAPS) a další

Zdroj: https://inria.hal.science/inria-00110507 ; [Research Report] PI 1822, 2006, pp.19.

Témata: Multi-core processor, temperature, thread scheduling, time slice, activity migration, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

Relation: Report N°: PI 1822

Dostupnost: https://inria.hal.science/inria-00110507
https://inria.hal.science/inria-00110507/document
https://inria.hal.science/inria-00110507/file/PI-1822.pdf

Minimizing Single-Usage Cache Pollution for Effective Cache Hierarchy Management

Autoři: Piquet, Thomas Rochecouste, Olivier Seznec, André a další

Přispěvatelé: Piquet, Thomas Rochecouste, Olivier Seznec, André a další

Zdroj: https://inria.hal.science/inria-00116611 ; [Research Report] PI 1826, 2006, pp.19.

Témata: Computer Architecture, Memory Hierarchy, Cache Pollution, Single-Usage Data, Block-Usage Prediction, Hardware Prefetching, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, ACM: B.: Hardware/B.3: MEMORY STRUCTURES, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

Relation: Report N°: PI 1826

Dostupnost: https://inria.hal.science/inria-00116611
https://inria.hal.science/inria-00116611v1/document
https://inria.hal.science/inria-00116611v1/file/PI-1826.pdf

A Case for a Complexity-Effective, Width-partitioned Microarchitecture

Autoři: Rochecouste, Olivier Pokam, Gilles Seznec, André a další

Přispěvatelé: Rochecouste, Olivier Pokam, Gilles Seznec, André a další

Zdroj: https://inria.hal.science/inria-00000211 ; [Research Report] PI 1742, 2005, pp.27.

Témata: Hardaware complexity, power consumption, superscalar processor, width-partitioned microarchitecture, register file, narrow-width operations, data-width predictor \\ Complexité matérielle, consommation électrique, processeur superscalaire, microarchitecture clusterisée, fichier de registres, opérations tronquées, prédicteur de largeur, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, ACM: C.: Computer Systems Organization/C.3: SPECIAL-PURPOSE AND APPLICATION-BASED SYSTEMS, [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR]

Relation: Report N°: PI 1742

Dostupnost: https://inria.hal.science/inria-00000211
https://inria.hal.science/inria-00000211/document
https://inria.hal.science/inria-00000211/file/PI-1742.pdf

OSCAR on Debian: the EDF Experience

Autoři: Vallée, Geoffroy Berthou, Jean-Yves Prisker, Hugues a další

Přispěvatelé: Vallée, Geoffroy Berthou, Jean-Yves Prisker, Hugues a další

Zdroj: https://inria.hal.science/inria-00000468 ; [Research Report] PI 1703, 2005, pp.13.

Témata: Cluster management, OSCAR, software packaging \\ Administration de grappes de calculateurs, empaquetage logiciel, ACM: D.: Software/D.4: OPERATING SYSTEMS, ACM: C.: Computer Systems Organization/C.1: PROCESSOR ARCHITECTURES, [INFO.INFO-OS]Computer Science [cs]/Operating Systems [cs.OS]

Relation: Report N°: PI 1703

Dostupnost: https://inria.hal.science/inria-00000468
https://inria.hal.science/inria-00000468/document
https://inria.hal.science/inria-00000468/file/PI-1703.pdf